Datasheet

198
AT8xC51SND1C
4109E–8051–06/03
Figure 154. Analog to Digital Converter Characteristics
Flash Memory
Definition of symbols Table 174. Flash Memory Timing Symbol Definitions
Timings Table 175. Flash Memory AC Timing
V
DD
= 2.7 to 3.3 V, T
A
= -40 to +85°C
1 2 3 4 5 6 7 1018 1019 1020 1021 1022 1023 1024
1
2
3
4
5
6
7
1018
1019
1020
1021
1022
1023
Offset
Error OSe
Code Out
AVIN
Offset
Error
OSe
Gain
Error
Ge
Ideal Transfer curve
1 LSB
(ideal)
Integral non-linearity (ILe)
Differential non-linearity (DLe)
Center of a step
Example of an actual transfer curve
0
0
(LSB ideal)
Signals Conditions
SISP
L Low
RRST VValid
B FBUSY flag X No Longer Valid
Symbol Parameter Min Typ Max Unit
T
SVRL
Input ISP Valid to RST Edge 50 ns
T
RLSX
Input ISP Hold after RST Edge 50 ns
T
BHBL
FLASH Internal Busy (Programming) Time 10 ms
N
FCY
Number of Flash Write Cycles 100K Cycle
T
FDR
Flash Data Retention Time 10 Years