Datasheet

164
AT8xC51SND1C
4109E–8051–06/03
Figure 126. Format and States in the Master Receiver Mode
AData
48h
ASLA
08h
MR
MT
Successful reception
from a slave transmitter
Next transfer started with
a repeated start condition
Not acknowledge received
after the slave address
Arbitration lost in slave
address or data Byte
Arbitration lost and
addressed as slave
Data A
From master to slave
From slave to master
Any number of data Bytes and their associated
acknowledge bits
This number (contained in SSSTA) corresponds
to a defined state of the TWI bus
SR
40h
A P
58h
SLASR
W
A P
10h
38h
A
continues
Other master
38h
A or A
continues
Other master
68h
A
continues
Other master
78h B0h
nnh
To corresponding
states in slave mode
Data
50h