Datasheet

93
T89C51AC2
4127D–8051–02/03
Table 65. IEN1 Register
IEN1 (S:E8h)
Interrupt Enable Register
Reset Value = xxxx xx00b
bit addressable
76543210
------EADC-
Bit
Number
Bit
Mnemonic Description
7-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
1 EADC
ADC Interrupt Enable bit
Clear to disable the ADC interrupt.
Set to enable the ADC interrupt.
0-
Reserved
The value read from this bit is indeterminate. Do not set this bit.