Datasheet

9
T89C51AC2
4127D–8051–02/03
Figure 4. Internal Pull-Up Configurations
Note: Port 2 p1 assists the logic-one output for memory bus cycles.
READ PIN
INPUT DATA
P1.x
OUTPUT DATA
2 Osc. PERIODS
n
p1(1)
p2
p3
VCCVCCVCC
P2.x
P3.x
P4.x