Datasheet

86
AT89C5132
4173C–USB–07/04
Clock Generator The MMC clock is generated by division of the oscillator clock (F
OSC
) issued from the
Clock Controller block as detailed in Section "Oscillator", page 11. The division factor is
given by MMCD7:0 Bits in MMCLK register. Figure 60 shows the MMC clock generator
and its output clock calculation formula.
Figure 60. MMC Clock Generator and Symbol
As soon as MMCEN bit in MMCON2 is set, the MMC controller receives its system
clock. The MMC command and data clock is generated on MCLK output and sent to the
command line and data line controllers. Figure 61 shows the MMC controller configura-
tion flow.
As exposed in Section “Clock Control”, MMCD7:0 Bits can be used to dynamically
increase or reduce the MMC clock.
Figure 61. Configuration Flow
MMCD7:0
MMCLK
MMC Clock
MMCclk
OSCclk
MMCD 1+
----------------------------
-
=
OSC
CLOCK
MMCEN
MMCON2.7
Controller Clock
MMC
CLOCK
MMC Clock Symbol
MMC Controller
Configuration
Configure MMC Clock
MMCLK = XXh
MMCEN = 1
FLOWC = 0