Datasheet

AT89C5132

4173C–USB–07/04

Table 65. UEPIEN Register

UEPIEN (S:C2h) – USB Endpoint Interrupt Enable Register

Reset Value = 0000 0000b

Table 66. UEPDATX Register

UEPDATX (S:CFh) – USB Endpoint X FIFO Data Register (X = EPNUM set in UEPNUM)

Reset Value = XXh

76543210

----EP3INTEEP2INTEEP1INTEEP0INTE

Bit

Number

Bit

Mnemonic Description

7 - 4 -

Reserved

The values read from these Bits are always 0. Do not set these Bits.

3EP3INTE

Endpoint 3 Interrupt Enable Bit

Set to enable the interrupts for endpoint 3.

Clear to disable the interrupts for endpoint 3.

2EP2INTE

Endpoint 2 Interrupt Enable Bit

Set to enable the interrupts for endpoint 2.

Clear this bit to disable the interrupts for endpoint 2.

1EP1INTE

Endpoint 1 Interrupt Enable Bit

Set to enable the interrupts for the endpoint 1.

Clear to disable the interrupts for the endpoint 1.

0EP0INTE

Endpoint 0 Interrupt Enable Bit

Set to enable the interrupts for the endpoint 0.

Clear to disable the interrupts for the endpoint 0.

76543210

FDAT7 FDAT6 FDAT5 FDAT4 FDAT3 FDAT2 FDAT1 FDAT0

Bit

Number

Bit

Mnemonic Description

7 - 0 FDAT7:0

Endpoint X FIFO Data

Data byte to be written to FIFO or data byte to be read from the FIFO, for the

Endpoint X (see EPNUM).