Datasheet

74
4341H–MP3–10/07
AT8xC51SND2C/MP3B
14. Audio Output Interface
The AT8xC51SND2C implement an audio output interface allowing the audio bitstream to be
output in various formats. It is compatible with right and left justification PCM and I
2
S formats
and thanks to the on-chip PLL (see Section “Clock Controller”, page 13) allows connection of
almost all of the commercial audio DAC families available on the market.
The audio bitstream can be from 2 different types:
• The MP3 decoded bitstream coming from the MP3 decoder for playing songs.
• The audio bitstream coming from the MCU for outputting voice or sounds.
14.1 Description
The C51 core interfaces to the audio interface through five special function registers: AUDCON0
and AUDCON1, the Audio Control registers (see Table 14-3 and Table 14-4); AUDSTA, the
Audio Status register (see Table 14-5); AUDDAT, the Audio Data register (see Table 14-6); and
AUDCLK, the Audio Clock Divider register (see Table 14-7).
Figure 14-1 shows the audio interface block diagram, blocks are detailed in the following
sections.
Figure 14-1. Audio Interface Block Diagram
AUD
CLOCK
UDRN
AUDSTA.6
0
1
DSIZ
AUDCON0.1
DSEL
Clock Generator
DCLK
DOUT
SCLK
JUST4:0
AUDCON0.7:3
POL
AUDCON0.2
AUDEN
AUDCON1.0
HLR
AUDCON0.0
0
1
SRC
AUDCON1.7
8
Data Converter
Audio Data
From C51
Audio Data
From MP3
DUP1:0
AUDCON1.2:1
16
16
SREQ
AUDSTA.7
Audio Buffer
AUBUSY
AUDSTA.5
Data Ready
DRQEN
AUDCON1.6
MP3 Buffer
Decoder
16
Sample
Request To
MP3 Decoder
AUDDAT
To DAC