Datasheet

55
4341H–MP3–10/07
AT8xC51SND2C/MP3B
11.3.4 Mode 3 (2 8-bit Timers)
Mode 3 configures Timer 0 such that registers TL0 and TH0 operate as separate 8-bit Timers
(see Figure 11-8). This mode is provided for applications requiring an additional 8-bit Timer or
Counter. TL0 uses the Timer 0 control bits C/T0# and GATE0 in TMOD register, and TR0 and
TF0 in TCON register in the normal manner. TH0 is locked into a Timer function (counting
F
TF1
/6) and takes over use of the Timer 1 interrupt (TF1) and run control (TR1) bits. Thus, oper-
ation of Timer 1 is restricted when Timer 0 is in mode 3. Figure 11-7 gives the autoreload period
calculation formulas for both TF0 and TF1 flags.
Figure 11-8. Timer/Counter 0 in Mode 3: 2 8-bit Counters
Figure 11-9. Mode 3 Overflow Period Formula
11.4 Timer 1
Timer 1 is identical to Timer 0 except for Mode 3 which is a hold-count mode. The following com-
ments help to understand the differences:
• Timer 1 functions as either a Timer or event Counter in three modes of operation. Figure 11-
2 through Figure 11-6 show the logical configuration for modes 0, 1, and 2. Timer 1’s mode 3
is a hold-count mode.
• Timer 1 is controlled by the four high-order bits of TMOD register (see Figure 11-2) and bits
2, 3, 6 and 7 of TCON register (see Figure 11-1). TMOD register selects the method of Timer
gating (GATE1), Timer or Counter operation (C/T1#) and mode of operation (M11 and M01).
TCON register provides Timer 1 control functions: overflow flag (TF1), run control bit (TR1),
interrupt flag (IE1) and interrupt type control bit (IT1).
• Timer 1 can serve as the Baud Rate Generator for the Serial Port. Mode 2 is best suited for
this purpose.
• For normal Timer operation (GATE1 = 0), setting TR1 allows TL1 to be incremented by the
selected input. Setting GATE1 and TR1 allows external pin INT1 to control Timer operation.
• Timer 1 overflow (count rolls over from all 1s to all 0s) sets the TF1 flag generating an
interrupt request.
TR0
TCON.4
TF0
TCON.5
INT0
0
1
GATE0
TMOD.3
Overflow
Timer 0
Interrupt
Request
C/T0#
TMOD.2
TL0
(8 bits)
TR1
TCON.6
TH0
(8 bits)
TF1
TCON.7
Overflow
Timer 1
Interrupt
Request
T0
TIM0
CLOCK
÷ 6
TIM0
CLOCK
÷ 6
TF0
PER
=
F
TIM0
6 ⋅ (256 – TL0)
TF1
PER
=
F
TIM0
6 ⋅ (256 – TH0)