Datasheet

46
4341H–MP3–10/07
AT8xC51SND2C/MP3B
Table 9-9. IPL1 Register
IPL1 (S:B2h) – Interrupt Priority Low Register 1
Reset Value = 0000 0000b
7 6 5 4 3 2 1 0
- IPLUSB - IPLKB - IPLSPI IPLI2C IPLMMC
Bit Number
Bit
Mnemonic Description
7 -
Reserved
The value read from this bit is always 0. Do not set this bit.
6 IPLUSB
USB Interrupt Priority Level LSB
Refer to Table 9-2 for priority level description.
5 -
Reserved
The value read from this bit is always 0. Do not set this bit.
4 IPLKB
Keyboard Interrupt Priority Level LSB
Refer to Table 9-2 for priority level description.
3 IPLADC
A to D Converter Interrupt Priority Level LSB
Refer to Table 9-2 for priority level description.
2 IPLSPI
SPI Interrupt Priority Level LSB
Refer to Table 9-2 for priority level description.
1 IPLI2C
Two Wire Controller Interrupt Priority Level LSB
Refer to Table 9-2 for priority level description.
0 IPLMMC
MMC Interrupt Priority Level LSB
Refer to Table 9-2 for priority level description.