Datasheet
233
4341H–MP3–10/07
AT8xC51SND2C/MP3B
24.4.5.3 Waveforms
Figure 24-28. External Clock Waveform
Figure 24-29. AC Testing Input/Output Waveforms
Note: 1. During AC testing, all inputs are driven at V
DD
-0.5 V for a logic 1 and 0.45 V for a logic 0.
2. Timing measurements are made on all outputs at V
IH
min for a logic 1 and V
IL
max for a logic 0.
Figure 24-30. Float Waveforms
Note: For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage
occurs and begins to float when a 100 mV change from the loading V
OH
/V
OL
level occurs with
I
OL
/I
OH
= ±20 mA.
0.45 V
T
CLCL
V
DD
- 0.5
V
IH1
V
IL
T
CHCX
T
CLCH
T
CHCL
T
CLCX
0.45 V
V
DD
- 0.5
0.7 V
DD
0.3 V
DD
V
IH
min
V
IL
max
INPUTS OUTPUTS
V
LOAD
V
OH
- 0.1 V
V
OL
+ 0.1 V
V
LOAD
+ 0.1 V
V
LOAD
- 0.1 V
Timing Reference Points