Datasheet

23
4341H–MP3–10/07
AT8xC51SND2C/MP3B
Reset Value = XXUU UXXX, UUUU UUUU after an hardware full chip erase.
Note: 1. X2B initializes the X2 bit in CKCON during the reset phase.
2. In order to ensure boot loader activation at first power-up, AT89C51SND2C products are deliv-
ered with BLJB programmed.
3. Bits 0 to 3 (LSN) can only be programmed by hardware mode.
Reset Value = XXXX XXXX, UUUU UUUU after an hardware full chip erase.
Reset Value = XXXX XXXX, UUUU UUUU after an hardware full chip erase.
Table 6-4. SBV Byte – Software Boot Vector
7 6 5 4 3 2 1 0
ADD15 ADD14 ADD13 ADD12 ADD11 ADD10 ADD9 ADD8
Bit Number
Bit
Mnemonic Description
7 - 0 ADD15:8
MSB of the user’s boot loader 16-bit address location
Refer to the boot loader datasheet for usage information (boot loader dependent)
Table 6-5. SSB Byte – Software Security Byte
7 6 5 4 3 2 1 0
SSB7 SSB6 SSB5 SSB4 SSB3 SSB2 SSB1 SSB0
Bit Number
Bit
Mnemonic Description
7 - 0 SSB7:0
Software Security Byte Data
Refer to the boot loader datasheet for usage information (boot loader dependent)