Datasheet
192
4341H–MP3–10/07
AT8xC51SND2C/MP3B
Table 21-4. Status for Slave Receiver Mode with Own Slave Address
Status
Code
SSSTA
Status of the TWI Bus
and TWI Hardware
Application Software Response
Next Action Taken by TWI HardwareTo/From SSDAT
To SSCON
SSSTA SSSTO SSI SSAA
60h
Own SLA+W has been
received; ACK has
been returned
No SSDAT action
No SSDAT action
X
X
0
0
0
0
0
1
Data Byte will be received and NOT ACK will be
returned.
Data Byte will be received and ACK will be returned.
68h
Arbitration lost in
SLA+R/W as master;
own SLA+W has been
received; ACK has
been returned
No SSDAT action
No SSDAT action
X
X
0
0
0
0
0
1
Data Byte will be received and NOT ACK will be
returned.
Data Byte will be received and ACK will be returned.
80h
Previously addressed
with own SLA+W; data
has been received;
ACK has been
returned
Read data Byte
Read data Byte
X
X
0
0
0
0
0
1
Data Byte will be received and NOT ACK will be
returned.
Data Byte will be received and ACK will be returned.
88h
Previously addressed
with own SLA+W; data
has been received;
NOT ACK has been
returned
Read data Byte
Read data Byte
Read data Byte
Read data Byte
0
0
1
1
0
0
0
0
0
0
0
0
0
1
0
1
Switched to the not addressed slave mode; no
recognition of own SLA or GCA.
Switched to the not addressed slave mode; own
SLA will be recognized; GCA will be recognized if
SSGC = logic 1.
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START condition
will be transmitted when the bus becomes free.
Switched to the not addressed slave mode; own
SLA will be recognized; GCA will be recognized if
SSGC = logic 1. A START condition will be
transmitted when the bus becomes free.
A0h
A STOP condition or
repeated START
condition has been
received while still
addressed as slave
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
0
0
1
1
0
0
0
0
0
0
0
0
0
1
0
1
Switched to the not addressed slave mode; no
recognition of own SLA or GCA.
Switched to the not addressed slave mode; own
SLA will be recognized; GCA will be recognized if
SSGC = logic 1.
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START condition
will be transmitted when the bus becomes free.
Switched to the not addressed slave mode; own
SLA will be recognized; GCA will be recognized if
SSGC = logic 1. A START condition will be
transmitted when the bus becomes free.