Datasheet

17
4341H–MP3–10/07
AT8xC51SND2C/MP3B
Reset Value = 0000 1000b
Table 5-3. PLLNDIV Register
PLLNDIV (S:EEh) – PLL N Divider Register
Reset Value = 0000 0000b
Table 5-4. PLLRDIV Register
PLLRDIV (S:EFh) – PLL R Divider Register
Reset Value = 0000 0000b
1 PLLEN
PLL Enable Bit
Set to enable the PLL.
Clear to disable the PLL.
0 PLOCK
PLL Lock Indicator
Set by hardware when PLL is locked.
Clear by hardware when PLL is unlocked.
7 6 5 4 3 2 1 0
- N6 N5 N4 N3 N2 N1 N0
Bit Number
Bit
Mnemonic Description
7 -
Reserved
The value read from this bit is always 0. Do not set this bit.
6 - 0 N6:0
PLL N Divider
7 - bit N divider.
7 6 5 4 3 2 1 0
R9 R8 R7 R6 R5 R4 R3 R2
Bit Number
Bit
Mnemonic Description
7 - 0 R9:2
PLL Most Significant Bits R Divider
8 MSB of the 10-bit R divider.
Bit Number
Bit
Mnemonic Description