Datasheet

107
4341H–MP3–10/07
AT8xC51SND2C/MP3B
16.4 Configuration
16.4.1 General Configuration
• USB controller enable
Before any USB transaction, the 48 MHz required by the USB controller must be correctly
generated (See “Clock Controller” on page 19).
The USB controller should be then enabled by setting the EUSB bit in the USBCON register.
• Set address
After a Reset or a USB reset, the software has to set the FEN (Function Enable) bit in the
USBADDR register. This action will allow the USB controller to answer to the requests sent
at the address 0.
When a SET_ADDRESS request has been received, the USB controller must only answer
to the address defined by the request. The new address should be stored in the USBADDR
register. The FEN bit and the FADDEN bit in the USBCON register should be set to allow
the USB controller to answer only to requests sent at the new address.
• Set configuration
The CONFG bit in the USBCON register should be set after a SET_CONFIGURATION
request with a non-zero value. Otherwise, this bit should be cleared.
16.4.2 Endpoint Configuration
• Selection of an Endpoint
The endpoint register access is performed using the UEPNUM register. The registers
– UEPSTAX
– UEPCONX
– UEPDATX
– UBYCTX
Theses registers correspond to the endpoint whose number is stored in the UEPNUM regis-
ter. To select an Endpoint, the firmware has to write the endpoint number in the UEPNUM
register.
Figure 16-7. Endpoint Selection
• Endpoint enable
Before using an endpoint, this must be enabled by setting the EPEN bit in the UEPCONX
register.
UEPNUM
Endpoint 0
Endpoint 2
UEPSTA0 UEPCON0 UEPDAT0
UEPSTA2 UEPCON2 UEPDAT2
0
1
2
SFR Registers
UEPSTAX UEPCONX UEPDATX
X
UBYCT0
UBYCT2
UBYCTX