Datasheet

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AT30TSE752A/754A/758A [DATASHEET]
Atmel-8854G-DTS-AT30TSE752A-754A-758A-Datasheet_102014
4.4 No-Acknowledge (NACK)
When the AT30TSE752A/754A/758A are transmitting data to the Master, the Master can indicate that it is done receiving
data and wants to end the operation by sending a NACK response to the AT30TSE752A/754A/758A instead of an ACK
response. This is accomplished by the Master outputting a Logic 1 during the ACK/NACK clock cycle, at which point the
AT30TSE752A/754A/758A will release the SDA line so that the Master can then generate a Stop condition.
In addition, the AT30TSE752A/754A/758A can use a NACK to respond to the Master instead of an ACK for certain
invalid operation cases such as an attempt to write to a Read-only Register (e.g. an attempt to write to the Temperature
Register).
Figure 4-1. Start, Stop, and ACK
SCL
SDA
Start
Condition
Data
Change
Allowed
Data
Change
Allowed
Data
Change
Allowed
Data
Change
Allowed
ACK
Stop
Condition
Data
Must be
Stable
Data
Must be
Stable
Data
Must be
Stable
1
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