Datasheet

AT30TSE752A/754A/758A [DATASHEET]
Atmel-8854G-DTS-AT30TSE752A-754A-758A-Datasheet_102014
42
11. SMBus Features and I
2
C General Call
11.1 SMBus Alert
The AT30TSE752A/754A/758A utilizes the ALERT pin to support the SMBus Alert function when the Alarm Thermostat
mode is set to the Interrupt mode (the CMP/INT bit of the Configuration Register is set to one) and the ALERT pin polarity
is set to active low (the POL bit of the Configuration Register is set to zero). The AT30TSE752A/754A/758A is a
slave-only device, and normally, slave devices on the SMBus cannot signal to the Master that they want to communicate;
however, the AT30TSE752A/754A/758A uses the SMBus Alert function (the ALERT pin) to signal to the Master that it
wants to communicate.
Several SMBus ALERT pins from different slave devices can be connected to a common SMBus Alert input on the
Master. When the SMBus Alert input on the Master is pulled low by one of the slave devices, the Master can perform a
specialized Read operation from the slave devices to determine which device sent the SMBus Alert signal.
The specialized Read operation is known as an SMBus Alert Response Address (ARA) and requires that the Master first
initiate a Start condition followed by the SMBus ARA code of 00011001. The slave device that generated the SMBus
Alert signal will respond to the Master with an ACK. After sending the ACK, the slave device will then output its own
device address (1001AAA for the AT30TSE752A/754A/758A where “AAA” corresponds to the hard-wired A
2-0
address
pins) on the bus. Since the device address is seven bits long, the remaining eighth bit (the LSB) is used as an indicator to
notify the Master which temperature limit caused the alarm (the LSB will be a Logic 1 if the T
HIGH
limit was met or
exceeded, and the LSB will be a Logic 0 if the T
LOW
limit was exceeded).
The SMBus ARA can activate several slave devices at the same time; therefore, if more than one slave responds,
standard SMBus arbitration rules apply and the device with the lowest address wins the arbitration. The device winning
the arbitration will clear its SMBus Alert output after it has responded to the SMBus ARA and provided its device address.
All other devices with higher addresses do not generate an ACK and continue to hold their SMBus Alert outputs low until
cleared. The Master will continue to issue SMBus ARA sequences until all slave devices that generated an SMBus Alert
signal have responded and cleared their SMBus Alert outputs.
Figure 11-1. SMBus Alert
Note: The “Limit” bit (the LSB) of the device address byte will be one or zero depending on if the T
HIGH
or T
LOW
limit was
exceeded.
SCK
SDA
SMBus ARA Code
AT30TS75 Device Address Byte
Start
by
Master
ACK
from
Slave
NACK
from
Master
Stop
by
Master
MSB MSB
0 0 0 1 1 0 0 1 0 1 0 0 1 A2 A1 A0 Limit 1
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9