Datasheet

29
AT30TSE752A/754A/758A [DATASHEET]
Atmel-8854G-DTS-AT30TSE752A-754A-758A-Datasheet_102014
6.6 Nonvolatile T
LOW
and T
HIGH
Limit Registers
The 16-bit Nonvolatile T
LOW
and T
HIGH
Limit Registers store the power-up/reset default values for the volatile versions of
the T
LOW
and T
HIGH
Limit Registers. Like their volatile counterparts, the temperature data values of the Nonvolatile T
LOW
and T
HIGH
Limit Registers are stored in the twos complement format with the MSB (bit 15) of the registers containing the
sign bit (zero indicates a positive number and a one indicates a negative number).
The values stored in both the Nonvolatile T
LOW
and T
HIGH
Limit Registers will be retained even after the device has been
powered down or reset. On every power-up or reset sequence, the contents of the Nonvolatile T
LOW
Limit Register will be
copied into the T
LOW
Limit Register, and the contents of the Nonvolatile T
HIGH
Limit Register will be copied into the T
HIGH
Limit Register. All temperature limit comparisons for the temperature alarm will be done using the volatile versions of the
T
LOW
and T
HIGH
Limit Registers. By utilizing the Nonvolatile T
LOW
and T
HIGH
Limit Registers, the device can
power-up or reset with pre-defined temperature limits specific to the particular application. Therefore, unlike standard
LM75-type temperature sensors, there is no need to update the lower and upper temperature limit values after every
power-up or reset.
Like the Nonvolatile Configuration Register, the Nonvolatile T
LOW
and T
HIGH
Limit Registers utilize nonvolatile storage
cells, so the same care must be taken when updating the registers to accommodate for the associated program time and
finite program endurance limit. Power must not be removed from the device during the internally self-timed programming
cycle of the registers. If power is removed prior to the completion of the programming cycle, then the contents of the
register being updated cannot be guaranteed. In addition, the contents of the register may become corrupt if it is
programmed more than the maximum allowed number of writes.
As with the Temperature Register, the resolution selected by the R1 and R0 bits of the Configuration Register will
determine how many bits of the T
LOW
and T
HIGH
Limit Registers will be used. Therefore, when writing to the T
LOW
and
T
HIGH
Limit Registers, up to 12 bits of data will be recognized by the device with the remaining LSBs being internally fixed
to the Logic 0 state. Similarly, when reading from the T
LOW
and T
HIGH
Limit Registers, up to 12 bits of data will be output
from the device with the remaining LSBs fixed in the Logic 0 state.
Table 6-12. Nonvolatile T
LOW
Limit Register and T
HIGH
Limit Register Format
Note: TD = Temperature Data
To set the value of either the Nonvolatile T
LOW
or T
HIGH
Limit Register, the Master must first initiate a Start condition
followed by the AT30TSE752A/754A/758A device address byte (1001AAA0 where “AAA” corresponds to the hard-wired
A
2-0
address pins). After the AT30TSE752A/754A/758A has received the proper address byte, the device will send an
ACK to the Master. The Master must then send the appropriate Pointer Register byte of 12h to select the Nonvolatile
T
LOW
Limit Register or 13h to select the Nonvolatile T
HIGH
Limit Register. After the Pointer Register byte has been sent,
the AT30TSE752A/754A/758A will send another ACK to the Master. After receiving the ACK from the
AT30TSE752A/754A/758A, the Master must then send two data bytes to the AT30TSE752A/754A/758A to set the value
of the Nonvolatile T
LOW
or T
HIGH
Limit Register. Any subsequent bytes sent to the AT30TSE752A/754A/758A will simply
be ignored by the device. If the Master does not send two complete bytes of data prior to issuing a Stop or repeated Start
condition, then the AT30TSE752A/754A/758A will ignore the data and the contents of the register will not be changed.
After the Master has issued a Stop condition, the AT30TSE752A/754A/758A will begin the internally self-timed program
operation, and the contents of the Nonvolatile T
LOW
or T
HIGH
Limit Register will be updated within a time of t
PROG
. During
Resolution
Upper Byte Lower Byte
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
12 bits Sign TD TD TD TD TD TD TD TD TD TD TD 0 0 0 0
11 bits Sign TD TD TD TD TD TD TD TD TD TD 0 0 0 0 0
10 bits Sign TD TD TD TD TD TD TD TD TD 0 0 0 0 0 0
9 bits Sign TD TD TD TD TD TD TD TD 0 0 0 0 0 0 0