Datasheet
AT30TSE752A/754A/758A [DATASHEET]
Atmel-8854G-DTS-AT30TSE752A-754A-758A-Datasheet_102014
26
6.4.7 RLCK
The nonvolatile RLCK bit controls the reversible locking of both the Volatile and Nonvolatile Configuration and Limit
Registers. When the RLCK bit is set to the Logic 0 state, the Configuration Register, T
LOW
Limit Register, T
HIGH
Limit
Register, Nonvolatile Configuration Register, Nonvolatile T
LOW
Limit Register, and Nonvolatile T
HIGH
Limit Register will be
unlocked and can be modified. Alternatively, when the RLCK bit is set to the Logic 1 state, the Volatile and Nonvolatile
Configuration and Limit Registers will be locked and cannot be modified. When the registers are locked, only the RLCK
bit of the Nonvolatile Configuration Register can be altered and reset back to a Logic 0. Any attempts at changing other
bits in the Nonvolatile Configuration Register will be ignored. The RLCK bit is set from the factory to default to the
Logic 0 state. See Section 7., “Register Locking” on page 32 for more details.
Figure 6-6. Write to Nonvolatile Configuration Register
Figure 6-7. Read from Nonvolatile Configuration Register
Note: Assumes the Pointer Register was previously set to point to the Nonvolatile Configuration Register.
SCL
SDA
Start
by
Master
ACK
from
Slave
ACK
from
Slave
Address Byte
Nonvolatile Configuration Register
Upper Byte
Nonvolatile Configuration Register
Lower Byte
Pointer Register Byte
MSB MSB
ACK
from
Slave
ACK
from
Slave
Stop
by
Master
MSB MSB
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
1 0 0 1 A A A 0 0 0 0 0 1 0 0 0 1 0
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
D15 D14 D13 D12 D11 D10 D9 D8 0 D7 D6 D5 D4 D3 D2 D1 D0 0
SCL
SDA
Start
by
Master
ACK
from
Slave
NACK
from
Master
Stop
by
Master
ACK
from
Master
Address Byte
Nonvolatile Configuration Register
Upper Byte
Nonvolatile Configuration Register
Lower Byte
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
1 0 0 1 A A A 1 0 D15 D14 D13 D12 D11 D10 D9 D8 0 D7 D6 D5 D4 D3 D2 D1 D0 1
MSB MSB MSB