Datasheet

AT30TSE752A/754A/758A [DATASHEET]

Atmel-8854G-DTS-AT30TSE752A-754A-758A-Datasheet_102014

To set the value of the Configuration Register, the Master must first initiate a Start condition followed by the

AT30TSE752A/754A/758A device address byte (1001AAA0 where “AAA” corresponds to the hard-wired A

2-0

address

pins). After the AT30TSE752A/754A/758A has received the proper address byte, the device will send an ACK to the

Master. The Master must then send the appropriate Pointer Register byte of 01h to select the Configuration Register.

After the Pointer Register byte of 01h has been sent, the AT30TSE752A/754A/758A will send another ACK to the

Master. After receiving the ACK from the AT30TSE752A/754A/758A, the Master must then send the appropriate data

byte to the AT30TSE752A/754A/758A to set the value of the Configuration Register. Only the first data byte sent to the

AT30TSE752A/754A/758A will be recognized as valid data; any subsequent bytes received by the device will simply be

ignored. If the Master does not send a complete byte of Configuration Register data prior to issuing a Stop or repeated

Start condition, then the AT30TSE752A/754A/758A will ignore the data and the contents of the Configuration Register

will be unchanged.

In addition to the Master not sending a complete byte of Configuration Register data, writing to the Configuration Register

will be ignored and no operation will be performed if the Volatile and Nonvolatile Registers are currently locked (the

RLCK bit of the Nonvolatile Configuration Register is in the Logic 1 state) or the Volatile and Nonvolatile Registers are

permanently locked down (the RLCKDWN bit of the Nonvolatile Configuration Register is in the Logic 1 state); however,

the device will still respond with an ACK to indicate that it received the proper data byte even though the contents of the

Configuration Register will not be changed.

Updating the Configuration Register, whether actually changing the Fault Tolerance Queue setting or not, will clear the

internal fault counter and reset the count back to zero.

6.3.1 OS Bit

The OS bit is used to enable the One-Shot Temperature Measurement mode. When a Logic 1 is written to the OS bit

while the AT30TSE752A/754A/758A is in the Shutdown mode, the device will become active and perform a single

temperature measurement and conversion. After the Temperature Register has been updated with the measured

temperature data, the device will return to the low-power Shutdown mode and clear the OS bit.

Writing a one to the OS bit when the device is not in the Shutdown mode will have no effect. When reading the

Configuration Register, the OS bit will always be read as a Logic 0.

6.3.2 R1:R0 Bits

The R1 and R0 bits are used to select the conversion resolution of the internal sigma-delta ADC. Four possible

resolutions can be set to maximize for either higher resolution or faster conversion times. The R1 and R0 bits will be

copied from the NVR1 and NVR0 in the Nonvolatile Configuration Register after device power-up or reset, allowing the

device to retain the conversion resolution that was previously set by the Nonvolatile Configuration Register prior to

power-down or reset.

Table 6-6. Conversion Resolution

R1 R0 Conversion Resolution Conversion Time

0 0 9 bits 0.5°C 25ms

0 1 10 bits 0.25°C 50ms

1 0 11 bits 0.125°C 100ms

1 1 12 bits 0.0625°C 200ms