Instruction Manual
E3 (34 Mbit/s) ATM mapping
Bit rate .................... ....................34368kbit/s
E1 (2 Mbit/s) ATM mapping
Bit rate .......................................... 2048 kbit/s
STM-1/VC3 ATM mapping
Bit rate ........................................155520kbit/s
OC-12c/STM-4c ATM testing BN 3060/90.91
Only in conjunction with BN 3060/90.50 and BN 3060/91.11 or
BN 3060/91.12
Signal structure (TC sublayer) contiguous concatenation to T1.646,
I.432 and af-phy-0046.000
Cell scrambler X
43
+1 (ITU-T) ................ canbeswitched off
Test cell channel
Adjustable from ............................ 0to149.760 Mbit/s
Header setting ........................................ editor
Load setting in .............. .............. Mbit/s, Cells/sec, %
Test cells, pay load pattern
AAL-0, pseudorandom bit sequences
(PRBS) ....................................2
11
±1, 2
15
±1, 2
23
±1
AAL-1, pseudorandom bit sequences
(PRBS) ....................................2
11
±1, 2
15
±1, 2
23
±1
Programmable word, length .............................16bits
Test cells for ATM performance analysis:
Sequence number ......................................3bytes
Timestamp ...........................................4bytes
Error checking .......................................CRC-16
Load profiles
Equidistant, setting range ................ 4to40000cell times +1
Constant Bit Rate (CBR), setting range . .............0.01% to 25%
Variable Bit Rate (VBR), settings
Peak cell rate ....................................1%to25%
Mean cell rate .................................. 1%to25%
Burst size ............................... 4to4092 cell times
Burst period ........................... 8to131068celltimes
Error insertion
Physical layer like basic ANT-20SE instrument
ATM layer, AAL:
Correctable and non-correctable header errors
AAL-0, cell payload bit error
AAL-1, sequence number error
AAL-1, SAR-PDU bit error
AAL-1 SNP, CRC error
AAL-1 SNP, parity error
Resolution:
Single error, error ratio, M errors in N cells
Alarm generation
Loss of Cell Delineation ................................. LCD
ATM layer (for any selected cell channel):
OAM F4/F5 fault flow:
VP AIS, VP RDI, VP AIS+VC AIS
VC AIS, VC RDI, VP RDI+VC RDI
Background load generator
1 ATM channel can be switched ON/OFF
Header........................................freely definable
Payload ................................ 1fill byte freely settable
CBR ............................................ 449Mbit/s
Circuit emulation
Generation of asynchronous channels:
1.544, 2.048, 6.312, 8.448, 34.368, 44.736 kbit/s,
2.048 kbit/s with PCM30 frame structure
ATM channel segmentation ..................AAL-1, ITU-T I.363
Error measurement, anomalies, statistics
Detection of following error types:
Correctable and non-correctable header errors
AAL-0, cell payload bit error
AAL-1, sequence number error
AAL-1, SAR-PDU bit error
AAL-1 SNP, CRC error
AAL-1 SNP, parity error
ATM performance analysis
±
Cell error ratio
±
Cell loss ratio
±
Cell misinsertion rate
±
Mean cell transfer delay
±
2-point cell delay variation
Measured between greatest and smallest value of cell transfer delay
±
Cell transfer delay histogram:
Number of classes........................................ 128
Min. class width ....................................... 160ns
Max. class width ...................................... 335ms
Adjustable offset ...................................0to167ms
Offset steps ........................................... 2.5ms
Alarm detection, defects (ISM, OoS)
Loss of Cell Delineation .................................. LCD
ATM layer (for any selected cell channel):
OAM F4/F5 fault flow:
VP AIS, VP RDI, VC AIS, VC RDI
Traffic channel analysis
Time chart simultaneously for
±
All traffic cells
±
Average cell rate of any selected cell channel
±
Peak cell rate of any selected cell channel
Display in ................................. Mbit/s, Cells/sec, %
Channel utilization histogram
±
All assigned cells
±
One selected cell channel (user cells)
Cell distribution in traffic channel
Classification of one selected cell channel by
±
User cells
±
F5 OAM flow
±
F4 OAM flow
±
User cells with CLP = 1
Circuit reassembly
Reassembly ................................ AAL-1, ITU-T I.363
Error measurement on asynchronous channels:
1.544, 2.048, 6.312, 8.448, 34.368, 44.736 kbit/s, 2.048 kbit/s with
PCM30 frame structure
24