User's Manual

Wi2Wi, Inc. Doc No. AST-PDT-DOC Rev.1.1
Data Sheet, WLAN-Bluetooth SiP– W2CBW003
Dated: October 20, 2006
The content of this document is to be treated as strictly confidential and is not to be disclosed,
reproduced or used, except as authorized in writing by Wi2Wi, Inc.
Copyright © 2006 Wi2Wi, Inc.
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x WLAN client connected to AP and using VOIP application (Skype) on PC to make a call
VoIP Voice Quality Clear
BT transfer data ( bit rate) 780 Kbps
7 WLAN External Interfaces
W2CBW003 supports SDIO and G-SPI interfaces for WLAN.
7.1 SDIO Interface
W2CBW003 supports SDIO device interface that conforms to the industry standard SDIO Full-Speed
card specification and allows a host controller using the SDIO bus protocol to access the WLAN device.
The SDIO interface contains interface circuitry between an external SDIO bus and the internal shared
bus.
W2CBW003 acts as a device on the SDIO bus. The host unit can access registers of the SDIO interface
directly and can access shared memory in the device through the use of BARs and a DMA engine.
The SDIO device interface main features include:
x On-chip memory used for CIS
x Supports SPI, 1-bit SDIO, and 4-bit SDIO transfer modes at the full clock range of 0 to 50 MHz
x Special interrupt register for information exchange
x Allows card to interrupt host
Table 3: SDIO Pin Map
W2CBW003 Pin Name SDIO Specification Pin Name Type Description
WF_SDIO_DATA_3
DAT3 I/O Data Line Bit 3
WF_SDIO_DATA_2
DAT2 I/O Data Line Bit 2
WF_SDIO_DATA_1
DAT1 I/O Data Line Bit 1
WF_SDIO_DATA_0
DAT0 I/O Data Line Bit 0
WF_SDIO_CLK
CLK I/O Clock
WF_SDIO_CMD
CMD I/O Command/Response
7.2 G-SPI Interface
W2CBW003 supports a generic, half-duplex, DMA-assisted SPI host interface (G-SPI) that allows a
host controller using a generic SPI bus protocol to access the WLAN device. The G-SPI interface
contains interface circuitry between an external SPI bus and the internal shared bus.
The 88W8686 acts as the device on the SPI bus. The host unit can access the G-SPI registers directly
and can access shared memory in the device through the use of BARs and a DMA engine.