User's Manual
Table Of Contents
- 1 Introduction
- NOTE:
- NOTE:
- 2 Product Architecture
- 3 Electrical Specifications
- 4 Mechanical Specifications
- 5 Performance
- 1. BT in SW RF-KILL in all the tests
- 2. HB values refer to internal FE SKU
- 3. OS: Win10
- 1. Wi-Fi in SW RF-KILL in all the tests
- 2. OS: Win10
- 3. WsP is Master device
- 1. The TX power per MCS relate to IEEE, mask compliance and limited by regulatory TX power limits.
- 2. The values relate to internal FE SKU
- 3. The values are for typical device and typical conditions
- 1. Measured at ANT port
- 2. Typical means Nominal corner, AVG over non BE CHs. AVG over freq segment and chains
- 3. Max means over PVT
- NOTE: The throughput values relate to Intel® Skylake Platform and CPU, Single User.
- 6 Thermal Specifications
- 7 Regulatory
- 8 Dynamic Regulatory Solution
- 9 Platform Design Guidelines
- 9.1 Socket 1 key options for 2230 cards
- 9.1.1 Socket 1 Hybrid Key E scheme
- 9.1.2 Connectorized Hybrid Key E (2230) pin-out
- 9.1.3 Special considerations for the Hybrid Key E scheme
- 9.1.4 Soldered-down (1216) pin-out
- 9.1.5 Breakout example for JfP soldered-down module
- 9.1.6 Signal connection pitfalls
- 9.1.7 Pullups and pulldowns
- 9.1.8 IO connection scenarios and best practices
- 9.1.9 I/F specific guidelines
- 9.1.10 Connectivity module power control
- 9.1.11 Power supply de-coupling
- 9.1.12 Wi-Fi wireless disable and HW RF-KILL
- 9.1.13 M.2 Bluetooth HW RF-KILL
- 9.1.14 BIOS
- 9.1 Socket 1 key options for 2230 cards
Platform Design Guidelines
Intel
®
Wireless-AC 9560 (Jefferson Peak)
External Product Specification (EPS) April 2017
46 Intel Confidential Document Number: 567240–1.0
9 Platform Design Guidelines
This section includes important platform design and implementation aspects that the OEM should take
into consideration when implementing a platform that would accommodate this product. Jefferson
Peak is an integrated connectivity RF companion module, and there has special platform design
guidelines are different from standard M.2 connectivity design features.
Besides having new interface requirements, integrated connectivity allows designing the platform so
as to support both integrated and discrete connectivity M.2 modules using a single platform design.
This allows the OEM to have one motherboard design accommodating either a Companion RF module
or a discrete M.2 card which can be “swappable” on the same M.2 socket.
This section focuses on the dual CNVi/Discrete design, and therefore will include guidelines applicable
to the Jefferson peak M.2 card as well as to other discrete M.2 cards.
9.1 Socket 1 key options for 2230 cards
Socket 1 has two options: Key E and Key A. Each key with different supported list of I/Fs as defined in
the M.2 specification.
In general the different keys should be used in the following cases:
Key E: When UART/I2S for BT is required.
Key A: When WiGig with display port is required – N/A for 2017 products
Hybrid Key E: When CNVi should be supported and when swappable CNVi/discrete should be
supported
In order to support the Jefferson Peak, or any other CNVi RF companion module the third option shall
be used on the design. The Hybrid Key E can be designed in a few different variants allowing some
level of flexibility including:
• Supporting integrated connectivity (CNVi) only
• Supporting swappable integrated/discrete connectivity (CNVi)
9.1.1 Socket 1 Hybrid Key E scheme
The high level block diagram in Figure 9–1 shows the platform-level view of CNVi, including all related
system components. Note that the connectivity block represents a few alternative options: Companion
RF, Discrete, and Wi-Fi/BT/WiGig Combo, all of which can be used in the design but are mutually
exclusive (only one can exist at a specific time).=