User Manual

PRIME / ProArt / TUF GAMING Intel 700 Series BIOS Manual
41
The following item appears only when Negative Ratio Offset B is set to [User Specify].
Ratio Offset
Use the <+> and <-> keys to adjust the value.
Configuration options: [0] - [31]
V/F Point Offset
Offset Mode Sign 1-11
Configuration options: [+] [-]
V/F Point 1-11 Offset
Configuration options: [Auto] [0.001] - [0.999]
Tweaker’s Paradise
Realtime Memory Timing
Allows you to enable or disable realtime memory timing. When set to [Enabled], the
system will allow performing realtime memory timing changes after MRC_DONE.
Configuration options: [Disabled] [Enabled]
SPD Write Disable
Allows you to enable or disable setting SPD Write Disable. For security
recommendations, SPD write disable bit must be set.
Configuration options: [TRUE] [FALSE]
PVD Ratio Threshold
For the Core Domain PLL, the threshold to switch to lower post divider is 15 by
default. You can set a value lower than 15 when pushing high BCLK so that Digitally
Controlled Oscillator (DCO) remains at reasonable frequency.
Configuration options: [Auto] [1] - [40]
SA
PLL Frequency Override
Allows you to configure Sa PLL Frequency.
Configuration options: [Auto] [3200 MHz] [1600 MHz]
BCLK TSC HW Fixup
Allows you to enable or disable BCLK TSC HW Fixup disable during TSC copy from
PMA to APIC.
Configuration options: [Enabled] [Disabled]
Core Ratio Extension Mode
Allows you to enable or disable Core Ratio Above 85 Extension Mode.
[Disabled]
Max Overclocking Ratio Limit as specified by OCMB 0x1 command
is 85.
[Enabled] Max Overclocking Ratio Limit as specified by OCMB 0x1 command
is 120.
FLL OC mode
Configuration options: [Auto] [Disabled] [Normal] [Elevated] [Extreme Elevated]