User Manual
Table Of Contents
- 1. Knowing BIOS
- 2. BIOS setup program
- 3. Managing and updating your BIOS
- 4. BIOS menu screen
- 5. Main menu
- 6. Ai Tweaker menu
- 7. Advanced menu
- 7.1 Trusted Computing
- 7.2 AMD fTPM configuration
- 7.3 Redfish Host Interface Settings
- 7.4 UEFI Variables Protection
- 7.5 Serial Port Console Redirection
- 7.6 CPU Configuration
- 7.7 PCI Subsystem Settings
- 7.8 USB Configuration
- 7.9 Network Stack Configuration
- 7.10 NVMe Configuration
- 7.11 HDD/SSD SMART Information
- 7.12 SATA Configuration
- 7.13 APM Configuration
- 7.14 Onboard Devices Configuration
- 7.15 PCIe Redriver Tuning
- 7.16 AMD Mem Configuration Status
- 7.17 AMD PBS
- 7.18 AMD Overclocking
- 7.19 AMD CBS
- 7.20 Third-party UEFI driver configurations
- 8. Monitor menu
- 9. Boot menu
- 10. Tool menu
- 11. Server Mgmt menu
- 12. Exit menu
Pro WS sTR5 Series BIOS Manual
75
DDR Controller Configuration
This item allows you to configure DDR controller configuration.
DDR Power Options
Power Down Enable
Allows you to enable or disable DDR power down mode.
Configuration options: [Disabled] [Enabled] [Auto]
Sub Urgent Refresh Lower Bound
Configuration options: [Auto] [1] - [6]
Urgent Refresh Limit
Specifies the stored refresh limit required to enter urgent refresh
mode. Constraint: SubUrgRefLowerBound <= UrgRefLimit Valid
value: 6~1.
Configuration options: [Auto] [1] - [6]
DRAM Refresh Rate
DRAM refresh rate: 1.95us or 3.9us (default).
Configuration options: [3.9 usec] [1.95 usec]
Self-Refresh Exit Staggering
Tcksrx += (Trfc/n * (UMC_NUMBER % 3)) Selectable by CBS Option:
Disable Staggering n = 1 <= Stagger Channels by ~270 ns, n=2 n=3
n=4... n=9 <= Stagger Channels By ~30 ns (Default).
Configuration options: [Auto] [Disabled] [n = 1] [n = 2] [n = 3] [n = 4] [n
= 5] [n = 6] [n = 7] [n = 8] [n = 9]
Max PMIC Power On
Maximum number of DIMMs that can power on at the same time.
Configuration options: [1] - [FF]
Max PMIC Power On
Maximum number of DIMMs that can power on at the same time.
Configuration options: [1] - [FF]
PMIC Stagger Delay
Amount of time to wait between powering on DIMMs in milliseconds.
Configuration options: [0] - [99]
PMIC SWA/SWB VDD Core
Range is from 1000mV to 1200mV; default is set to 1100mV.
Configuration options: [1000] - [1200]
PMIC SWC VDDIO
Range is from 1000mV to 1200mV; default is set to 1100mV.
Configuration options: [1000] - [1200]
PMIC Fault Recovery
[Always] PMIC will ignore previous boot errors. No channel
disabled.
[Never] PMIC disables the channel with errors from previous
boot.
[Once] PMIC will ignore the previous boot errors once. More
than one channel will be disabled.
PMIC Operation Mode
Programmable Mode allows certain registers to be programmed after
VR enable else they will be in secure mode.
Configuration options: [Secure Mode] [Programmable Mode]
DDR MBIST Options
This item allows you to configure DDR Memory MBIST.
MBIST Enable
Allows you to enable or disable Memory MBIST.
Configuration options: [Disabled] [Enabled] [Auto]