User Manual
Table Of Contents
- 1. Knowing BIOS
- 2. BIOS setup program
- 3. Managing and updating your BIOS
- 4. BIOS menu screen
- 5. Main menu
- 6. Ai Tweaker menu
- 7. Advanced menu
- 7.1 Trusted Computing
- 7.2 AMD fTPM configuration
- 7.3 Redfish Host Interface Settings
- 7.4 UEFI Variables Protection
- 7.5 Serial Port Console Redirection
- 7.6 CPU Configuration
- 7.7 PCI Subsystem Settings
- 7.8 USB Configuration
- 7.9 Network Stack Configuration
- 7.10 NVMe Configuration
- 7.11 HDD/SSD SMART Information
- 7.12 SATA Configuration
- 7.13 APM Configuration
- 7.14 Onboard Devices Configuration
- 7.15 PCIe Redriver Tuning
- 7.16 AMD Mem Configuration Status
- 7.17 AMD PBS
- 7.18 AMD Overclocking
- 7.19 AMD CBS
- 7.20 Third-party UEFI driver configurations
- 8. Monitor menu
- 9. Boot menu
- 10. Tool menu
- 11. Server Mgmt menu
- 12. Exit menu
Pro WS sTR5 Series BIOS Manual
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Additional Memory Tweaks
DDR Training Runtime Reduction
[Disabled] Force Disable DDR Training Runtime Reduction.
[Enabled] Force Enable DDR Training Runtime Reduction.
[Auto] Default code behavior. If OC is ENABLE, DDR Training Runtime
Reduction will be DISABLE by DEFAULT.
DDR5 Nitro Mode
Can improve overclocked memory support for modules over 6000Mt/s with potential boot
time and/or latency tradeoffs.
Configuration options: [Auto] [Enabled] [Disabled]
The following items appear only when DDR5 Nitro Mode is set to [Enabled].
DDR5 Robust Training Mode
A more comprehensive memory training algorithm that increases boot time but can result
in improved stability at overclocked memory settings.
Configuration options: [Auto] [Enabled] [Disabled]
Nitro RX Data
Configures the RX Timing between memory controller and PHY. Higher value may
enable increased memory frequency at the expense of increased latency.
Configuration options: [Auto] [1] [2] [Disabled]
Nitro TX Data
Configures the TX Timing between memory controller and PHY. Higher value may enable
increased memory frequency at the expense of increased latency.
Configuration options: [Auto] [0] [1] [2] [3] [Disabled]
Nitro Control Line
Configures the command timing latency between the memory controller and PHY. Higher
value may enable increased memory frequency at the expense of increased latency.
Configuration options: [Auto] [0] [1] [Disabled]
Nitro RX Burst Length
DQ Training Pattern Length - Higher number results in more robust training and longer
runtime. Lower number results in less robust training and shorter runtime, but potentially
less stability.
Configuration options: [Auto] [1x] [2x] [4x] [8x]
Nitro TX Burst Length
DQ Training Pattern Length - Higher number results in more robust training and longer
runtime. Lower number results in less robust training and shorter runtime, but potentially
less stability.
Configuration options: [Auto] [1x] [2x] [4x] [8x]
TX DFE Taps
Specifies the number of TX DFE taps.
Configuration options: [Auto] [1] - [4]
RX DFE Taps
Specifies the number of RX DFE taps.
Configuration options: [Auto] [1] - [4]
RX2D_TrainOpt
Configuration options: [Auto] [Manual]