User Manual
ASUS P9A-I Series
4-29
4.5.1 Processor Configuration
Version 2.16.1243. Copyright (C) 2013 American Megatrends, Inc.
Aptio Setup Utility - Copyright (C) 2013 American Megatrends, Inc.
Main Advanced IntelRCSetup Server Mgmt Event Logs Security Boot Monitor Tool Exit
Aptio Setup Utility - Copyright (C) 2013 American Megatrends, Inc.
Main Advanced IntelRCSetup Server Mgmt Event Logs Security Boot Monitor Tool Exit
Enable/Disable EIST. GV3
and TM1 must be enabled
for TM2 to be available.
GV3 must be enabled for
Turbo. Auto-Enable for BO
CPU stepping, all others
disabled, change setting
to override.
Denes SKU specic units
used for power, energy
and time
→←:
Select Screen
↑↓:
Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F5: Optimized Defaults
F10: Save & Exit
ESC: Exit
Processor Conguration
Processor ID 000406D8
Processor Frequency 2.407GHz
L1 Cache RAM 448KB
L2 Cache RAM 4096KB
Processor Version Genuine Intel(R) CPU
EIST (GV3) [Auto]
P-state Coordination [Package]
TM1 [Enable]
TM2 Mode [Adaptive Throtting]
CPU C State [Auto]
Enhanced Halt State (C1E) [Disable]
ACPI C2 [C6 NS]
Monitor/Mwait [Enable]
L1 Prefetcher [Enable]
L2 Prefetcher [Enable]
ACPI 3.0 T-States [Disable]
Fast String [Enable]
Machine Check [Enable]
Execute Disable Bit [Enable]
VMX [Enable]
BIST Selection [Disable]
MTRR Default as uncacheable. [Disable]
Extended APIC [Enable]
AES-NI [Enable]
PECI Enable [Enable]
PECI Trusted [Disable]
PECI SMBus Speed [Standard (80 KHz)]
Turbo [Enable]
RAPL
MSR 606 PKG_POWER_SKU_UNIT a1003
MSR 610 PKG_TURBO_PWR_LIM 468bb8005b89c4
MSR 670 PKG_TURBO_CFG1 40c001
MSR 672 TURBO_WKLD_CFG2 0
Active Processor Cores [All]
CPU Flex Ratio Override [Disable]
CPU Core Ratio 24
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button. Press the
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button to go back to the rst item in the rst page.
Navigate to the second page of the screen to see the rest of items in this menu by pressing
the Up or Down arrow keys.
EIST (GV3) [Auto]
Allows you to enable or disable the Enhanced Intel SpeedStep Technology (EIST).
Conguration options: [Auto] [Enable] [Disable]
P-state Coordination [Package]
Selects package or module level P-state Ratio Coordination. VID always resovlves to the
highest P-state VID of any core in the SoC. Conguration options: [Package] [Module]
[Hardware]