User Manual

2-12 Chapter 2: BIOS information
2.4.2 CPU Conguration
The items in this menu show the CPU-related information that the BIOS automatically
detects.
GART Error Reporting [Disabled]
This option should remain disabled for the normal operation. The driver developer may
enable it for testing purpose. Conguration options: [Disabled] [Enabled]
Microcode Updation [Enabled]
Enables or disables Microcode Updation. Conguration options: [Disabled] [Enabled]
Secure Virtual Machine Mode [Disabled]
Enables or disables Secure Virtual Machine Mode (SVM). Conguration options: [Disabled]
[Enabled]
Cool ‘n’ Quiet [Enabled]
Enables or disables the AMD
®
Cool ‘n’ Quiet technology. Conguration options: [Enabled]
[Disabled]
C1E Support [Disabled]
Enables or disables the CPU Enhanced Halt (C1E) function, a CPU power-saving function
in system halt state. When this item is enabled, the CPU core frequency and voltage will be
reduced during the system halt state to decrease power consumption.
Conguration options: [Disabled] [Enabled]
Advanced Clock Calibration [Disabled]
Adjusts the processor’s overclocking capability. When this item is set to [Auto], the BIOS
automatically adjusts this function. When this item is set to [All Cores], the processor has
the best overclocking performance. When this item is set to [Per Core], the processor’s
overclocking capability is enhanced. Conguration options: [Disabled] [Auto] [All Cores]
[Per Core]
2.4.3 Chipset
NorthBridge Conguration
Memory Conguration
Bank Interleaving [Auto]
Allows you to enable the bank memory interleaving. Conguration options: [Disabled]
[Auto]
Channel Interleaving [XOR of Address bit]
Allows you to enable the channel memory interleaving.
Conguration options: [Disabled] [Address bits 6] [Address bits 12]
[XOR of Address bits [20:16, 6]] [XOR of Address bits [20:16, 9]]
Enable Clock to All DIMMs [Disabled]
Enables unused Clocks to DIMMs even though memory slots are not populated.
Conguration options: [Disabled] [Enabled]