User’s Manual

2-21
華碩 M2A-MX 主板用戶手冊
北橋設置
Bank Interleaving [Disabled]
本項目允許您開啟或關閉 Bank Memory Interleaving。設置值有:
[Disabled] [Auto]
Channel Interleaving [Auto]
本項目允許您開啟或關閉 channel memory interleaving。設置值有:
[Disabled] [Auto] [Reserved] [Reserved] [Reserved]
Enable Clock to All DIMMs [Disabled]
本項目允許您開啟或關閉未使用時鐘至未安裝內存條的 DIMMs Even
Memory 插槽。 設置值有: [Disabled] [Enabled]
MemCLK Tristate C3/ATLVID [Disabled]
本項目允許您開啟或關閉 C3 中的 MemCLK Tri-Stating during 和 Alt VID。
設置值有: [Disabled] [Enabled]
Memory Hole Remapping [Enabled]
本項目允許您開啟或關閉 Memory Remapping Around Memory Hole。
設置值有: [Disabled] [Enabled]
NorthBridge Chipset Conguration
Memory Conguration
DRAM Timing Conguration
Alternate VID [Auto]
Memory CLK :333 MHz
CAS Latency(Tcl) :5.0
RAS/CAS Delay(Trcd) :5 CLK
Row Precharge Time(Trp):5 CLK
Min Active RAS(Tras) :15 CLK
RAS/RAS Delay(Trrd) :3 CLK
Row Cycle (Trc) :21 CLK
內存設置
Memory Conguration
Bank Interleaving [Disabled]
Channel Interleaving [Auto]
Enable Clock to ALL DIMMs [Disabled]
MemCLK Tristate C3/ATLVID [Disabled]
Memory Hole Remapping [Enabled]
Unganged Mode support [Enabled]
Power Down Enable [Enabled]
Power Down Mode [Channel]
Enable Bank Memory
Interleaving