User Manual

華碩 KGN(M)H-D16 主板用戶手冊
4-23
PCIE Slot 1 Core Setting
Powerdown Unused lanes [Enabled]
設置值有:[Disabled] [Enabled]
Turn Off PLL During L1/L23 [Enable]
設置值有:[Disabled] [Enabled]
TX Drive Strength [Auto]
設置值有:[Auto] [26mA] [20mA] [22mA] [24mA]
TXCLK Clock Gating in L1 [Enabled]
設置值有:[Disabled] [Enabled]
LCLK Clock Gating in L1 [Enabled]
設置值有:[Disabled] [Enabled]
SB Core Setting
TX Drive Strength [Auto]
設置值有:[Auto] [26mA] [20mA] [22mA] [24mA]
TXCLK Clock Gating in L1 [Enable]
設置值有:[Disabled] [Enabled]
LCLK Clock Gating in L1 [Enable]
設置值有:[Disabled] [Enabled]
Hyper Transport Configuration
HT Extended Address [Disabled]
設置值有:[Auto] [Disabled] [Enable]
HT3 Link Power State [Auto]
設置值有:[Auto] [LS0] [LS1] [LS2] [LS3]
UnitID Clumping [Auto]
[A u t o] [D i s a b l e d] [U n i t I D 2/3] [U n i t I D B/C]
[UnitID 2/3&B/C]
HT Link Tristate [Auto]
設置值有:[Auto] [Disabled] [CAD/CTL] [CAD/CTL/CLK]
NB Deempasies Level [Disabled]
[D i sab l e d] [-0.4d B] [-1.32d B] [-2.08d B] [-3.1dB]
[-4.22dB] [-5.50dB] [-7.05dB]
IOMMU [Disabled]
設置值有:[Disabled] [Enabled]