User Manual

4-20
第四章：BIOS 程序設置
南橋設置（SouthBridge Configuration）
v02.61 (C)Copyright 1985-2010, American Megatrends, Inc.
BIOS SETUP UTILITY
Advanced
SouthBridge Chipset Conguration
SP5100 CIMx Version : 5.5.0
SB Debug Conguration
OHCI HC (Bus 0 Dev 18 Fn 0) [Enabled]
OHCI HC (Bus 0 Dev 18 Fn 1) [Enabled]
EHCI HC (Bus 0 Dev 18 Fn 2) [Enabled]
OHCI HC (Bus 0 Dev 19 Fn 0) [Enabled]
OHCI HC (Bus 0 Dev 19 Fn 1) [Enabled]
EHCI HC (Bus 0 Dev 19 Fn 2) [Enabled]
OHCI HC (Bus 0 Dev 18 Fn 5) [Enabled]
←→ Select Screen
↑↓ Select Item
+- Change Option
F1 General Help
F10 Save and Exit
ESC Exit
Options for SB Debug
Features
DRAM 時序設置（DRAM Timing Configuration）
DRAM Timing Config [Auto]
設置值有：[Auto] [Manual]
Memory Clock Speed [400 MHz]
本項目允許您設置內存時鐘頻率。僅當【DRAM Timing Config】
項目設為 [Manual] 時此項目才可設置。設置值有：[400 MHz] [533
MHz] [667 MHz]
Memory Timing Parameters [CPU Node 0]
本項目允許您選擇需要顯示的 node 的時間參數。
BIOS SETUP UTILITY
Advanced
BIOS SETUP UTILITY
Advanced
DRAM Timing Conguration
DRAM Timing Cong [Auto]
Options
Auto
Manual