User Manual
Table Of Contents
- Chapter 1
- Chapter 2
- Chapter 3
- BIOS setup
- 3.1 BIOS setup program
- 3.2 Main menu
- 3.3 Advanced menu
- 3.3.1 PCH-FW Configuration
- 3.3.2 Trusted Computing
- 3.3.3 CPU Configuration
- 3.3.4 Graphics Configuration
- 3.3.5 PCI Express Configuration
- 3.3.6 Super IO Configuration
- 3.3.7 Serial Console Redirection
- 3.3.8 SATA Configuration
- 3.3.9 Network Stack Configuration
- 3.3.10 USB Configuration
- 3.3.11 NVMe Configuration
- 3.3.12 Onboard Device Configuration
- 3.3.13 APM Configuration
- 3.3.14 Watchdog Timer
- 3.3.15 EZ-Flash
- 3.3.16 LVDS Configuration
- 3.4 Hardware Monitor menu
- 3.5 Security menu
- 3.6 Boot menu
- 3.7 Exit menu
- BIOS setup
- Appendix
J6412T-IM-A
2-16
10. MPCIe slot (MPCIE)
This slot allows you to install a full length mini-PCIe card, providing you with
expandability and connectivity solutions for an optimal system performance.
MPCIE
PIN 1
WAKE#
3.3V_1
Reserved1
GND7
Reserved2
1.5V_1
CLKREQ#
UIM_PWR
GND1
UIM_DATA
REFCLK-
UIM_CLK
REFCLK+
UIM_RESET
GND2
UIM_VPP
Reserved
GND8
Reserved
W_DISABLE#
GND3
PERST#
PERp0
3.3V
PERn0
GND9
GND4
1.5V_2
GND5
SMB_CLK
PETn0
SMB_DATA
PETp0
GND10
GND6
USB_D-
GND
USB_D+
3.3V
GND11
3.3V
NC
mPCIE_mSATA_SW
NC
Reserved7
NC
Reserved8
1.5V_3
Reserved9
GND12
mSATA_Present
3.3V_2
GND13
GND14
NP_NC1
NP_NC2
11. LVDS/EDP header (30-pin LVDS_EDP)
This header is for an internal LVDS or embedded DisplayPort connection.
LVDS_EDP
PIN 1 PIN 39
PIN 2 PIN 40
LCD_VCC
LVDS panel present pin (panel side connect to GND)
GND
LCD_VCC
LVDS_TX_TA0P_R
LVDS_TX_TA0N_R
LVDS_TX_TC0P_R
LVDS_TX_TC0N_R
LVDS_TX_TD0P_R
LVDS_TX_TD0N_R
GND
LVDS_TX_TB1P_R
LVDS_TX_TB1N_R
LVDS_TX_TD1P_R
LVDS_TX_TD1N_R
SW_eDP_HPD
SW_OUT_eDP1N_R
SW_OUT_eDP1P_R
SW_OUT_eDP_AUX_C_N
SW_OUT_eDP_AUX_C_P
LCD_VCC
GND
colay_SCL_eDPTXN3
colay_DAT_eDPTXP3
LVDS_TX_TB0P_R
LVDS_TX_TB0N_R
LVDS_TX_TCLK0P_R
LVDS_TX_TCLK0N_R
GND
LVDS_TX_TA1P_R
LVDS_TX_TA1N_R
LVDS_TX_TC1P_R
LVDS_TX_TC1N_R
LVDS_TX_TCLK1P_R
LVDS_TX_TCLK1N_R
SW_OUT_eDP2P_R
SW_OUT_eDP2N_R
SW_OUT_eDP0N_R
SW_OUT_eDP0P_R
LCD_BL_PWM_CN