User's Manual

2-15華碩 H81T R2.0 主板用戶手冊
DRAM READ to PRE Time [Auto]
設置值有：[Auto] [1 DRAM Clock] – [15 DRAM Clock]
DRAM FOUR ACT WIN Time [Auto]
設置值有：[Auto] [1 DRAM Clock] – [255 DRAM Clock]
DRAM WRITE to READ Delay [Auto]
設置值有：[Auto] [1 DRAM Clock] – [15 DRAM Clock]
DRAM CKE Minimum pulse width [Auto]
設置值有：[Auto] [1 DRAM Clock] – [15 DRAM Clock]
DRAM CAS# Write to Latency [Auto]
設置值有：[Auto] [1 DRAM Clock] – [31 DRAM Clock]
RTL IOL control
DRAM RTL initial Value [Auto]
設置值有：[Auto] [1 DRAM Clock] - [63 DRAM Clock]
DRAM RTL (CHA) [Auto]
設置值有：[Auto] [1 DRAM Clock] - [63 DRAM Clock]
DRAM RTL (CHB) [Auto]
設置值有：[Auto] [1 DRAM Clock] - [63 DRAM Clock]
DRAM IO-L (CHA) [Auto]
設置值有：[Auto] [1 DRAM Clock] - [15 DRAM Clock]
DRAM IO-L (CHB) [Auto]
設置值有：[Auto] [1 DRAM Clock] - [15 DRAM Clock]
Third Timings
tRDRD [Auto]
設置值有：[Auto] [1 DRAM Clock] – [7 DRAM Clock]
tRDRD_dr [Auto]
設置值有：[Auto] [1 DRAM Clock] – [15 DRAM Clock]
tRDRD_dd [Auto]
設置值有：[Auto] [1 DRAM Clock] – [15 DRAM Clock]
tWRRD [Auto]
設置值有：[Auto] [1 DRAM Clock] – [63 DRAM Clock]
tWRRD_dr [Auto]
設置值有：[Auto] [1 DRAM Clock] – [15 DRAM Clock]
tWRRD_dd [Auto]
設置值有：[Auto] [1 DRAM Clock] – [15 DRAM Clock]
tWRWR [Auto]
設置值有：[Auto] [1 DRAM Clock] – [7 DRAM Clock]
tWRWR_dr [Auto]
設置值有：[Auto] [1 DRAM Clock] – [15 DRAM Clock]