User's Manual

Intel
®
820 Chipset Design Guide 2-27
Layout/Routing Guidelines
To minimize impedance discontinuities, the traces for CMD and SCK must have a neckdown from
18 mil traces to 5 mil traces for 175 mils on either side of the SCK/CMD attach point as shown in
Figure 2-28.
Figure 2-28. RDRAM CMOS Shunt Transistor
175 mils
PWROK
SCK
MCH
2N3904
18 mils
wide
175 mils
MCH
18 mils
wide
18 mils
wide
5 mils
wide
175
mils
175
mils
CMD
2N3904
2N3904
VCC5SBY
5 mils
wide
18 mils
wide
R
I
M
M
S
R
I
M
M
S