User's Manual

Layout/Routing Guidelines
2-10 Intel
®
820 Chipset Design Guide
Figure 2-11 and Figure 2-12 show a top view of an example RSL breakout and route.
Figure 2-11. Primary Side RSL Breakout Example
Neckdown to
pass vias
BJT
14 on 6
Differential
clock pair
Ground Flood
(Shaded area)
18 mil clock
traces when
not 14:6
Neckdown for BJT