User's Manual

11-30-1999_10:26
DECOUPLING
34
C365
0.1UF
0.1UF
C366
0.1UF
C221
0.1UF
C60 C29
0.1UF
0.1UF
C30
C156
0.01UF
0.01UF
C213
0.1UF
C253
0.1UF
C231C232
0.1UF
C248
0.1UF
C254
0.01UF
0.01UF
C224C230
0.01UF
C252
0.01UF
0.1UF
C257C265
0.1UF
0.1UF
C184C260
0.1UF
C210
100UF
100UF
C285C219
100UF
C288
100UF
100UF
C284C289
100UF
100UF
C303
100UF
C302
C226
0.1UF
C105
0.1UF
4.7UF
C88C290
4.7UF
U3
10
9
8
7
14
U3
14
7
11
12
13
U15
14
7
1011
U15
13 12
7
14
U20
89
14
7
U20
7
14
11 10
U20
1213
14
7
U14
14
7
98
U18
12
13
11
14
7
U14
1011
7
14
U19
43
7
14
U19
14
7
11 10
U19
1213
7
14
U18
7
14
3
2
1
C202
0.01UF
C212
0.1UF
C157
0.1UF
0.1UF
C197
0.1UF
C235 C264
0.1UF
0.01UF
C162
C258
0.1UF
0.01UF
C368
C201
0.01UF
0.01UF
C367
0.01UF
C166 C343
0.01UF
0.01UF
C344
0.01UF
C261C262
0.01UF
PCD PLATFORM DESIGN
REV:
DRAWN BY:
LAST REVISED:
PROJECT:
SHEET:
FOLSOM, CALIFORNIA 95630
1900 PRAIRIE CITY ROAD
87654321
A
B
C
D
12345678
D
C
B
A
1.01
TITLE: INTEL(R) 820 CHIPSET CUSTOMER REFERENCE BOARD
OF 36
R
VCC5SBY
VCC3_3
VCMOS1_8SBYVCC2_5SBYVCC2_5SBY
SN74LVC08A
SN74LVC08A
74LVC14A
74LVC14A
VCC3_3SBY
SN74LVC06A
GND
VCC
SN74LVC06A
GND
VCC
SN74LVC06A
GND
VCC
SN74LVC07A
GND
VCC
74LS132
VCC
GND
VCC3_3SBY
SN74LVC07A
GND
VCC
VCC3_3SBY
SN74LVC07A
GND
VCC
SN74LVC07A
GND
VCC
SN74LVC07A
GND
VCC
74LS132
VCC
GND
VCC3_3SBY
VCC3_3 VCC3_3SBY
VCC1_8
VDDQ
VCC1_8
VDDQ
Place these caps on solder side
70 mils of outer balls of MCH.
Place VDDQ capacitors within
For chipset decoupling, use 0.1UF and
0.01UF decoupling capacitor at each
corner of the device. If there is room,
add 0.01UF capacitors in the middle
of each quad.
Place a VCMOS1_8SBY 0.1uF cap at each RIMM.
Un-used Gates
Place 100uF caps, 0.1 ohm ESR, among RIMM connectors.
RIMM Decoupling82559 Decoupling.ICH Decoupling
Decoupling
Place these caps on solder side
MCH Decoupling