User's Manual

11-24-1999_11:14 8
ICH
6,8,37
HUBREF
PGNT#5
21,32
PGNT#4
32
PGNT#3
16,32
21,32
PGNT#2
PGNT#1
20,32
PGNT#0
20,32
PREQ#5
21,32
PREQ#4
32
PREQ#3
16,32
PREQ#2
21,32
PREQ#1
20,32
20,32
PREQ#0
12,21,32
SERIRQ
4,32
PICD1
PICD0
4,32
5
APICCLK
IRQ15
22,32
IRQ14
22,32
20,21,32
PIRQ#D
PIRQ#C
20,21,32
19,20,21,32
PIRQ#B
PIRQ#A
16,19,20,21,32
6,8,37HUBREF
7,37
HL_STB#
7
HL[10:0]
HL10
HL9
HL8
HL7
HL6
HL5
HL4
HL3
HL2
HL1
HL0
AD[31:0]
16,20,21
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
16,20,21
C_BE#[3:0]
C_BE#0
C_BE#1
C_BE#2
C_BE#3
DEVSEL#
16,20,21,32
FRAME#
16,20,21,32
IRDY#
16,20,21,32
TRDY#
16,20,21,32
STOP#
16,20,21,32
PAR
16,20,21
PCIRST#
6,10,11,12,16,19,20,21,22
PLOCK#
20,21,32
SERR#
16,20,21,32
PERR#
16,20,21,32
16,19,20,21
PCI_PME#
ICHPCLK
5
12,32
A20GATE
12,32
KBRST#
STPCLK#
4,32
4,32
SMI#
4,32
LINT1
4,32
LINT0
HINIT#
4,10,32
IGNNE#
4,32
4,32
FERR#
4,32
SLP#
A20M#
4,32
R226 301-1%
R225 301-1%
40.2-1%
R239
21,32
REQ#A
21,32
GNT#A
ICH_HLCOMP
HL11_TP
U13
M17
H17
G17
J17
H15
L17
K17
K16
G16
F17
D17
K1
E9
E2
E1
F5
F4
F3
F2
G4
G2
C13
A13
N6
D10
C14
R5
P5
J13
R4
C17
E16
F14
A15
B15
A17
B10
B7
E7
D8
C7
A12
C12
B13
D12
B11
B12
A14
F16
J14
B16
E14
B17
B9
A9
C4
D5
B3
D9
D6
A3
B2
D2
B4
C5
A8
B6
D7
A6
B5
C2
B8
A7
A4
C6
D4
C3
E4
D3
D1
C1
J15
A1
N14
A2
E15
E12
C16
B1
F13
E17
J5
A11
C9
F15
P11
A10
C10
P4
HL_STB
7,37
TP1
0.1UF
C218
0.01UF
C237
PCD PLATFORM DESIGN
REV:
DRAWN BY:
LAST REVISED:
PROJECT:
SHEET:
FOLSOM, CALIFORNIA 95630
1900 PRAIRIE CITY ROAD
87654321
A
B
C
D
12345678
D
C
B
A
1.01
TITLE: INTEL(R) 820 CHIPSET CUSTOMER REFERENCE BOARD
OF 36
R
VCC1_8
CPU
HUB
IRQ
ICH_A
PCI
PCI
GND;R2,G3,H8,J8,K8,H9,J9,K9,H10,J10,K10,G14,K15 VCC3_3;E3,A5,E5,G5,N5,E6,P6,T7,C8,U10 VCC3_3;C11,E13,N13,R13,M14,D16,T16 VCC1_8;G13,H14,K14,G15,L15,H16,J16
ICH_096
GPIO1/REQ#B/REQ#5
PIRQD#
PIRQB#
IRQ14
FERR#
AD29
GNT#4
PCIRST#
HL1
A20M#
AD13’
APICCLK
CPUSLP#
INIT#
IRDY#
IRQ15
SERR#
HL4
AD12
AD8
AD9
AD10
AD15
AD14
AD19
AD16
AD26
AD25
AD11
AD20
AD22
AD24
AD23
AD27
AD18
AD17
CBE0#
CBE#1
CBE#2
CBE#3
DEVSEL#
FRAME#
STOP#
TRDY#
PAR
PLOCK#
IGNNE#
INTR
NMI
HL10
HL11
REQ#0
REQ#2
REQ#4
REQ#3
REQ#1
GNT#3
GNT#2
AD31
AD30
AD21
AD28
PIRQC#
STPCLK#
A20GATE
RCIN#
SMI#
APICD0
APICD1
SERIRQ
HUBREF
GPIO16/GNT#A
GPIO17/GNT#B/GNT#5
PCICLK
PIRQA#
GPIO0/REQ#A
GNT#0
GNT#1
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
PERR#/GPIO7
PME#
HL0
HL2
HL3
HL5
HL6
HL7
HL8
HL9
HL_STB
HL_STB#
HLCOMP
VCC1_8
HUBREF voltage = 0.9V +/- 2%
Place HUBREF circuit between MCH and ICH
Place R239 less than 0.5" from the ICH using a 10 mil trace.
Place C237 close to ICH.
ICH