User's Manual

Intel
®
820 Chipset Design Guide A-1
Reference Design Schematics: Uni-Processor
Reference Design Schematics:
Uni-Processor A
A.1 Reference Design Feature Set
The reference schematics feature the following core feature set:
•
Intel
®
820 Chipset
— Memory Controller Hub (MCH)
— I/O Controller Hub (ICH)
— FWH Flash BIOS Interface
•
Support for the Pentium III (SC242) Processor
— 100/133 MHz System Bus Frequency
— Debug Port
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IOAPIC Integrated into the ICH
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Direct RDRAM Memory Interface
— 266 MHz, 300 MHz, 356 MHz and 400 MHz Direct RDRAM Support
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4 PCI Add-in Slots
— Via 4 REQ/GNT pairs (ICH supports 6 REQ#/GNT# pairs)
•
AGP Universal Connector
— 3.3V - 1X,2X signaling
— 1.5V – 1X, 2X, 4X signaling
•
2 IDE Connectors with Ultra ATA/66 Support
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2 USB Connectors
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ATX Power Connector
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LPC Ultra I/O
— Floppy Disk Controller
— 1 Parallel Port, 2 Serial Ports
— Keyboard Controller
•
AC‘97 Bus Connector and Audio Codec
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WfM Support
•
Integrated System Management
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Integrated Power Management
— ACPI Rev. 1.0 Compliant
— APM Rev. 1.2 Compliant
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Pentium III on-board VRM 8.4 compliant regulator
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4 Layer Design