User's Manual

Intel
®
820 Chipset Design Guide 4-9
Clocking
For the line section labeled ‘D’ (DRCG to Last RIMM) the CTM/CTM# must be length matched
within ±2 mils (exactly is recommended), and for the section labeled ‘C’, ±2 mil trace length
matching is required for the CFM/CFM# signals.
Note: Total trace length matching for the entire CTM/CTM# signal trace (Sections A+B+D) and for the
CFM/CFM# signal trace (Sections A+B) is ±2 mils (exact length matching is recommended).
The CFM/CFM# differential pair signals require termination using either 27 1% or 28 2%
resistors and a 0.1 uF capacitor as shown in Figure 4-8.
Figure 4-6. Differential Clock Routing Diagram (Section ‘A’, ‘C’, & ‘D’)
Figure 4-7. Non-Differential Clock Routing Diagram (Section ‘B’)
Ground CLOCK CLOCK# Ground
Ground/Power Plane
22 mils 22 mils14 mils 14 mils
6 mils 6 mils6 mils
4.5 mils 4.5 mils
2.1 mils
1.4 mils
dif lk t d
Ground CLOCK/CLOCK# Ground
Ground/Power Plane
10 mils 10 mils18 mils
6 mils 6 mils
4.5 mils 4.5 mils
2.1 mils
1.4 mils
Figure 4-8. Termination for Direct Rambus* Clocking Signals CFM/CFM#
R1
CFM
CFM#
R2
28
2%
or
27
1%
C1
0 .1 uF
28
2%
or
27
1%