User's Manual
Intel
®
820 Chipset Design Guide 4-5
Clocking
NOTES:
1. Differential Clocking Pair
2. CFM/CFM# driven by MCH
Table 4-3. Intel
®
820 Chipset Platform System Clock Cross-Reference
CK133/DRCG Pin Name Component Pin Name
PCICLK
PCI Slot CLK
PCI Slot CLK
PCI Slot CLK
PCI Slot CLK
PCI Slot CLK
ICH PCICLK-F
LPC Super I/O CLK
FWH Flash BIOS CLK
3V66
MCH GCLKIN
ICH CLK66
AGP Connector (on-board device) CLK
48 MHz ICH CLK48
CPUCLK
CPU BCLK
CPU BCLK
MCH HCLKIN
CPU_div2 DRCG Refclk
APIC
CPU PICCLK
CPU PICCLK
ICH APICCLK
Clk/ClkB
1
RDRAMs
MCH CTM/CTM#
CFM/CFM#
1,2
RDRAMs
PclkM MCH HCLKOUT
SynclkN MCH RCLKOUT