User Manual
Table Of Contents
- Safety information
- Chapter 1: Product Introduction
- Chapter 2: Hardware Setup
- 2.1 Chassis cover
- 2.2 Air ducts
- 2.3 Central Processing Unit (CPU)
- 2.4 System memory
- 2.5 Storage devices
- 2.6 Expansion slots
- 2.6.1 Installing an expansion card to the front PCIe riser card bracket (on select models)
- 2.6.2 Installing an ASUS PIKE II card
- 2.6.3 Installing an HBA/RAID card
- 2.6.4 Installing an expansion card to the rear left PCIe expansion card bracket (on select models)
- 2.6.5 Installing an expansion card to the rear right PCIe expansion card bracket (on select models)
- 2.6.6 Installing an OCP 3.0 card to the rear right OCP 3.0 socket board (on select models)
- 2.6.7 (optional) Installing the PFR module
- 2.7 Cable connections
- 2.8 Removable/optional components
- 2.9 Installing GPU cards
- 2.10 Installing Optional Kits
- Chapter 3: BIOS Setup
- 3.1 Managing and updating your BIOS
- 3.2 BIOS setup program
- 3.3 Main menu
- 3.4 Performance Tuning menu
- 3.5 Advanced menu
- 3.5.1 Trusted Computing
- 3.5.2 PSP Firmware Versions
- 3.5.3 Redfish Host Interface Settings
- 3.5.4 AMD CBS
- 3.5.5 APM Configuration
- 3.5.6 Serial Port Console Redirection
- 3.5.7 CPU Configuration
- 3.5.8 PCI Subsystem Settings
- 3.5.9 USB Configuration
- 3.5.10 Network Stack Configuration
- 3.5.11 CSM Configuration
- 3.5.12 NVMe Configuration
- 3.5.13 SATA Configuration
- 3.5.14 AMD Mem Configuration Status
- 3.5.15 Tls Auth Configuration
- 3.6 Chipset menu
- 3.7 Security menu
- 3.8 Boot menu
- 3.9 Tool menu
- 3.10 Save & Exit menu
- 3.11 Event Logs menu
- 3.12 Server Mgmt menu
- Chapter 4: Driver Installation
- Appendix
3-36
Chapter 3: BIOS Setup
Root Complex 0xC0 LCLK Frequency [Auto]
Set Root Complex LCLK Frequency (Bus range 0xC0-0xDF).
[Auto] Dynamic Frequency Control (Enhanced PIO setting will be
in effect).
[593MHz] Set LCLK Frequency at 593MHz (Overrides Enhanced PIO
setting).
Root Complex 0xE0 LCLK Frequency [Auto]
Set Root Complex LCLK Frequency (Bus range 0xE0-0xFF).
[Auto] Dynamic Frequency Control (Enhanced PIO setting will be
in effect).
[593MHz] Set LCLK Frequency at 593MHz (Overrides Enhanced PIO
setting).
DF PState Mode Select [Auto]
[Normal] Normal
[Limit Highest] FCLK is limited to DF Pstate FCLK Limit, only the highest DF
Pstate is used.
[Limit All] FCLK is limited to DF Pstate FCLK limit, all DF Pstates are
used.
[Auto] Auto
EDC Control [Auto]
[Auto] Use the fused VDDCR_CPU EDC limit.
[Manual] User can set customized VDDCR_CPU EDC limit.
The following items appears only when EDC Control is set to [Manual].
EDC [0]
Allows you to set the VDDCR_CPU EDC Limit [A].
EDC Platform Limit [0]
Allows you to set the EDC Platform Limit [W].
NBIO RAS Common Options
NBIO RAS Control [Auto]
Configuration options: [Disabled] [MCA] [Legacy] [Auto]
Egress Poison Severity High [30011]
Each bit set to 1 enables HIGH severity on the associated IOHC egress port. A
bit of 0 indicates LOW severity.
Egress Poison Severity Low [4]
Each bit set to 1 enables HIGH severity on the associated IOHC egress port. A
bit of 0 indicates LOW severity.
NBIO SyncFlood Generation [Auto]
This value may be used to mask SyncFlood caused by NBIO RAS options.
When set to TRUE, SyncFlood from NBIO is masked. When set to FALSE,
NBIO is capable of generating SyncFlood.
Configuration options: [Disabled] [Enabled] [Auto]
NBIO SyncFlood Reporting [Auto]
This value may be used to enable SyncFlood reporting to APML. When set to
TRUE, SyncFlood will be reported to APML. When set to FALSE, the reporting
will be disabled.
Configuration options: [Disabled] [Enabled] [Auto]