User Manual
Table Of Contents
- Safety information
- Chapter 1: Product Introduction
- Chapter 2: Hardware Setup
- Chapter 3: Installation Options
- Chapter 4: Motherboard Infomation
- Chapter 5: BIOS Setup
- 5.1 Managing and updating your BIOS
- 5.2 BIOS setup program
- 5.3 Main menu
- 5.4 Performance Tuning menu
- 5.5 Advanced menu
- 5.5.1 Trusted Computing
- 5.5.2 PSP Firmware Versions
- 5.5.3 APM Configuration
- 5.5.4 Onboard LAN Configuration
- 5.5.5 Serial Port Console Redirection
- 5.5.6 CPU Configuration
- 5.5.7 PCI Subsystem Settings
- 5.5.8 USB Configuration
- 5.5.9 Network Stack Configuration
- 5.5.10 CSM Configuration
- 5.5.11 NVMe Configuration
- 5.5.12 SATA Configuration
- 5.5.13 AMD Mem Configuration Status
- 5.5.14 iSCSI Configuration
- 5.6 Chipset menu
- 5.7 Security menu
- 5.8 Boot menu
- 5.9 Tool menu
- 5.10 Save & Exit menu
- 5.11 AMD CBS menu
- 5.12 Event Logs menu
- 5.13 Server Mgmt menu
- Chapter 6: Driver Installation
- Appendix
5-39
ASUS ESC4000A-E10
Aggressor Channel [1 Aggressor Channel]
This helps read the aggressors channels. If set to
[Enabled]
, you can
read from one or more than one aggressor channel. The default is set to
[Disabled]
.
Configuration options: [Disabled] [1 Aggressor Channel] [3 Aggressor
Channels] [7 Aggressor Channels]
Aggressor Static Lane Control [Disabled]
Configuration options: [Disabled] [Enabled]
The following items appear only when
Aggressor Static Lane Control
is set to
[Enabled]
.
Aggressor Static Lane Select Upper 32 bits [0]
Static Lane Select for Upper 32 bits. The bit mask represents the bits to be
read.
Configuration options: [0] - [99999999]
Aggressor Static Lane Select Lower 32 bits [0]
Static Lane Select for Lower 32 bits. The bit mask represents the bits to be
read.
Configuration options: [0] - [99999999]
Aggressor Static Lane Select ECC [0]
Static Lane Select for ECC Lanes. The bit mask represents the bits to be
read.
Configuration options: [0] - [9]
Aggressor Static Lane Value [0]
Configuration options: [0] - [9]
Target Static Lane Control [Disabled]
Configuration options: [Disabled] [Enabled]
The following items appear only when
Target Static Lane Control
is set to
[Enabled]
.
Target Static Lane Select Upper 32 bits [0]
Static Lane Select for Upper 32 bits. The bit mask represents the bits to be
read.
Configuration options: [0] - [99999999]
Target Static Lane Select Lower 32 bits [0]
Static Lane Select for Lower 32 bits. The bit mask represents the bits to be
read.
Configuration options: [0] - [99999999]
Target Static Lane Select ECC [0]
Static Lane Select for ECC Lanes. The bit mask represents the bits to be
read.
Configuration options: [0] - [9]
Target Static Lane Value [0]
Configuration options: [0] - [9]
Data Eye Type [Worst Case Margin Only]
This option determines which results are expected to be captured for Data
Eye. Supported options are 1D Voltage Sweep, 1D Timing Sweep, 2D Full
Data Eye and Worst Case Margin only.
Configuration options: [1D Voltage Sweep] [1D Timing Sweep] [2D Full
Data Eye] [Worst Case Margin Only]