User Manual

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• The FULL_CARD_POWER_OFF# and the RESET# pins are unique and intended to be used
when the WWAN solution is plugged into platforms that provide a direct connection to VBATT
(and not a regulated 3.3 V) such as Tablet platforms. They are not used in NB and Very thin
notebooks type platforms that provide a regulated 3.3 V power rail. But the
FULL_CARD_POWER_OFF# signals should be tied to the 3.3V power rail on the NB/very thin
platform.
• The SSD can make use of the PCIe two Lanes or overlaid SATA host I/F. The actual implemented
I/F is identified through the CONFIG_1 pin state (1 or 0) in conjunction with the other three
Configuration pin states that are all 0. DAS/DSS# (overlaid on the LED1#) and DEVSLP are
intended for use with the SATA SSD solution.
• The SUSCLK pin provides a Slow Clock signal of 32 kHz to enable Low Power States.
• Pins labeled N/C should Not Be Connected.
3.6.3.2 Back Panel Header (2.0 mm Pitch)
This section describes the functions of the front panel header. Error! Reference source not found.
19 lists the signal names of the front panel header. Error! Reference source not found.9 is a
connection diagram for the front panel header.
Table 19. Back Panel Header (2.0 mm pitch)
Pin
Signal Name
Description
Pin
Signal Name
Description
1
HDD_POWER_LED
Pull-up 750Ω to +5V
2
POWER_LED_MAIN
[Out] Front panel LED (main
color) Pull-up 300Ω to +5V
3
HDD_LED#
[Out] HDD activity LED
4
POWER_LED_ALT
[Out] Front panel LED (alt
color)
5
GROUND
Ground
6
POWER_SWITCH#
[In] Power switch
7
RESET_SWITCH#
[In] Reset switch
8
GROUND
Ground
9
+5V_DC (1A) (Vcc)
VCC5 (1A current rating)
10
Key
No pin
11
5Vsby (2A)
5VSB (2A current rating)
12
3.3Vsby (1A)
3VSB (1A current rating)