User manual

MEX ASPERA-3
Ref.:
ME-ASP-MA-0002
Issue:
Issue 1 Rev. 4
Date:
15/2/2002
Page:
Page 7 of 58
ASPERA-3 EGSE User Manual
IFSI
CNR
Figure 1 – The TI 320C54x DSKplus board
This board connect to the (MEXILT) module through the PC parallel port at a speed of ~ 100 Kbytes/
s.
At start up the MEXILT module download the (C language) program to the DSK. The DSK receive the
TC packets and local instruction and send TM packets from/to ILT PC.
The figure 1 shows the overall S/C simulator concept, “external electronic” schematics are in Appendix.
Figure 5.1.2-3 – The S/C simulator concept
1.4 SDM
External
Electronic
Commands
& TM
Circular
buffers
DS
K
Serial
Port
Pulse
generator
14 bit
A/D
Extern Addr
Extern Data
Interrupt
controller
Signal
generation
S
-
TM
TC
Continuous
SL
Memory Load
Sam
p
lin
g
Serial Telemetry
Sam
p
lin
g
2 x 263
16 bit Out Port
16 bit In Port
Serial Data
Transfer Clock
Memory Load
Data
Serial
Telemetry Data
To ILT
parallel port