Specifications

MDR Server boot status
During each reboot, an automatic Built-In Test (BIT) is carried out to ensure that the
MDR board and the MDR Server are working correctly.
Built-In Test Description
The MDR BIT covers the following components of the MDR board:
• MIDAS board Test carried out by the MIDAS Monitor (at boot up)
• SCSI PMC Test carried out by the BSP and MDR Server (initialization)
• DPIO PMCs Test carried out by the MDR Server (initialization)
• VMFC-2100 PMC Test carried out by the MDR Server (initialization)
• Ethernet PMC Test carried out by the MDR Server (initialization)
Boot Diagnostic Word
The result of each of these tests is stored on the board (in the i960 processor) and can be
retrieved via the VMEbus at any time or by a program using the MDR API. The layout
of the result is a word called the Boot Diagnostic Word (BDW).
The layout of the BDW is the following:
MIDAS board BDWMDR Tests
02025
MIDAS board BDWMDR Tests
02025
19 0
15 14 89
MIDAS Board Elements
(i960, DRAM, ...)
MIDAS Board
PMC slots
Reserved
19 015 14 89
MIDAS Board Elements
(i960, DRAM, ...)
MIDAS Board
PMC slots
Reserved
Reserved
Universe
(PCI to
VME
Bridge)
Reserved
I960
#1
Serial
EEPROM
Not
Used
Rest
of
DRAM
DRAM
BANK 0
UART
2143 05678
Bit = 0  PMC present Bit = 1  No PMC or ERROR
Reserved
Universe
(PCI to
VME
Bridge)
Reserved
I960
#1
Serial
EEPROM
Not
Used
Rest
of
DRAM
DRAM
BANK 0
UART
2143 05678
Reserved
Universe
(PCI to
VME
Bridge)
Reserved
I960
#1
Serial
EEPROM
Not
Used
Rest
of
DRAM
DRAM
BANK 0
UART
2143 05678
Bit = 0  PMC present Bit = 1  No PMC or ERROR
PMC
Slot
5
PMC
Slot
4
PMC
Slot
2
PMC
Slot
3
PMC
Slot
2b
PMC
Slot
1
91013 1214 11
Bit = 0  OK Bit = 1  ERROR
PMC
Slot
5
PMC
Slot
4
PMC
Slot
2
PMC
Slot
3
PMC
Slot
2b
PMC
Slot
1
91013 1214 11
PMC
Slot
5
PMC
Slot
4
PMC
Slot
2
PMC
Slot
3
PMC
Slot
2b
PMC
Slot
1
91013 1214 11
Bit = 0  OK Bit = 1  ERROR
112 MDR User Guide
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