Technical data

Functional Description
MVME2502 Installation and Use (6806800R96B)
73
4.2.12 Security Engine (SEC) 3.1
The integrated security engine of the P2020 is designed to off-load intensive security functions
like key generation and exchange, authentication and bulk encryption from the processor core.
It includes eight different execution units where data flows in and out of an EU.
13 E23 Connected to pin R7 of the CPLD (unused input)
12 F23 Connected to pin M8 of the CPLD (unused input)
11 D24 Connected to pin M7 of the CPLD (unused input)
10 A25 Not connected
09 A24 Not connected
08 F22 Not connected
07 R25 Not connected
06 R29 Connected to pin T6 of the CPLD (unused input)
05 R24 Connected to pin R6 of the CPLD (unused input)
04 U29 Connected to INTA of the QUART. Programmed
as a discrete input or to generate IRQ11.
Also connected to pin P16 of the CPLD. (unused
input)
03 N24 Connected to pin P15of the CPLD
02 P29 Connected to Pin R16 of the CPLD. Programmed
to generate a IRQ09 interrupt to the CPU based
on contents of the CPLD GPIO2 interrupt
register. For more information see, PLD GPIO2
Interrupt Register on page 109.
01 R26 Connected to INTA_N of the DS1337 Real Time
Clock (RTC). Programmed as a discrete input or
to generate IRQ08
00 R28 Connected to LED_P21[2] of the BCM5482S.
Programmed as a discrete input or to generate
IRQ07.
Table 4-1 P2020 GPIO Functions
GPIO bit CPU Pin # Function