Technical data

Memory Maps and Registers
MVME2502 Installation and Use (6806800R96B)
117
Since the processor is 16-bits and the tick timer is 32-bits, the compare register was split in half.
Accessing the whole register will require two transactions.
5.6.4 Counter High and Low Word Registers
When enabled, the tick timer counter register increments every microsecond. Software may
read or write the counter at any time.
Table 5-27 Compare High Word Registers
REG
Tick Timer 0 Compare Value High Word - 0xFFC80204
Tick Timer 1 Compare Value High Word - 0xFFC80304
Tick Timer 2 Compare Value High Word - 0xFFC80404
Bit 1514131211109876543210
Field TickTimer Compare Value High Word (16-bits)
OPER R/W
RESET 0x0000
Table 5-28 Compare Low Word Registers
REG
Tick Timer 0 Compare Value Low Word - 0xFFC80206
Tick Timer 1 Compare Value Low Word - 0xFFC80306
Tick Timer 2 Compare Value Low Word - 0xFFC80406
Bit 1514131211109876543210
Field TickTimer Compare Value Low Word (16-bits)
OPER R/W
RESET 0x0000
Table 5-29 Counter High Word Registers
REG
Tick Timer 0 Counter Value High Word - 0xFFC80208
Tick Timer 1 Counter Value High Word - 0xFFC80308
Tick Timer 2 Counter Value High Word - 0xFFC80408
Bit 1514131211109876543210