Technical data

Memory Maps and Registers
MVME2502 Installation and Use (6806800R96B)
112
5.5.17 EMMC Reset Register
The MVME2502 provides a register for EMMC Reset.
5.5.18 PLD Watchdog Timer Refresh Register
The MVME2502 provides a watchdog timer refresh register.
Table 5-20 PLD Shutdown and Reset Control and Reset Reason Register
REG EMMC Reset Register
Bit7654 3 210
Field RSVD RSVD RSVD RSVD RSVD RSVD RSVD EMMC_R
ST_N
OPER R R/W
RESET0000 X XXX
Field Description
EMMC_RST_N EMMC Reset Bit
1 - Reset is deasserted
0 - Reset is asserted (write 0 to reset EMMC)
Table 5-21 PLD Watchdog Timer Refresh Register
REG PLD Watch Dog Timer Load - 0xFFC80600
Bit 15 14 13 12 11 10 9 8 76543210
Field RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD Refresh
OPER R
RESET 0000
Field Description
Refresh Counter Refresh. When the pattern 0x00DB is written, the watchdog counter
will be reset to zero.