Technical data

Memory Maps and Registers
MVME2502 Installation and Use (6806800R96B)
106
5.5.12 PLD Write Protect and I2C Debug Register
The MVME2502 PLD provides an 8-bit register which is used to indicate the status of I2C and
SPI write-protect manual switches and is used to control the SPI write-enable. I2C debug ports
are also provided in this register which can be used in controlling the bus’ status.
Field Description
BOOT_BLOCK_A Boot Block Manual Selector Switch
1 - SPI0
0 - SPI1
BOOT_SPI Actual Boot Bank
1 - SP1
0 - SPI0
Table 5-15 PLD Write Protect and I2C Debug Register
REG PLD Write Protect I2C Debug- 0xFFDF0054
Bit76543210
Field RSVD MASTER
_WP_DI
SABLED
FLASH_
WP_N
I2C_DEB
UG_EN
SERIAL_
FLASH_
WP
RSVD I2C_1_
D
I2C_1_C
OPER R R R R/W R/W R R/W R/W
RESET01001011
Field Description
SPD_WP- SPD write-protection
0 - SPD Writesenabled
1 - SPD Writes disabled
MASTER_WP- MASTER WP Switch (S2-6)
0-Switch S2-6 closed. SPI, SPD, VPD, USER FLASH
writeable
1-Switch S2-6 open, register bits control write
protection