Datasheet

ARMulator Reference
4-60 Copyright © 1999-2001 ARM Limited. All rights reserved. ARM DUI0058D
width
is the width of the data bus in bytes (that is, 1 for an 8-bit bus, 2 for a
16-bit bus, or 4 for a 32-bit bus).
access
describes the type of accesses that can be performed on this region of
memory:
r
for read-only.
w
for write-only.
rw
for read-write.
-
for no access. Any access causes a Data or Prefetch Abort.
An asterisk (*) can be appended to
access
to describe a Thumb-based
system that uses a 32-bit data bus to memory, but which has a 16-bit latch
to latch the upper 16 bits of data, so that a subsequent 16-bit sequential
access can be fetched directly out of the latch.
read-times
describes the nonsequential and sequential read times in nanoseconds.
These must be entered as the nonsequential read access time followed by
a slash ( / ), followed by the sequential read access time. Omitting the
slash and using only one figure indicates that the nonsequential and
sequential access times are the same.
NoteNote
For accurate modelling of real devices, you might have to add a signal
propagation delay (20 to 30ns) to the read and write times quoted for a
memory chip.
write-times
describes the nonsequential and sequential write times. The format is the
same as that given for read times.
The following examples assume a clock speed of 20MHz, the default.
Example 1
0 80000000 RAM 4 rw 135/85 135/85
This describes a system with a single continuous section of RAM from
0
to
0x7FFFFFFF
with a 32-bit data bus, read-write access, nonsequential access time of 135ns, and
sequential access time of 85ns.