Datasheet
Glossary
Glossary-6 Copyright © 1999-2001 ARM Limited. All rights reserved. ARM DUI 0064D
Processor Status
Register
See Program Status Register.
Program Counter
(PC)
Integer register R15 (or bits[25:2] of R15 on 26-bit architectures)
Program Status
Register (PSR)
Contains some information about the current program and some information about the
current processor. Often, therefore, also referred to as Processor Status Register. Also
referred to as Current PSR (CPSR), to emphasize the distinction between it and the
Saved PSR (SPSR). The SPSR holds the value the PSR had when the current function
was called, and which will be restored when control is returned.
An Enhanced Program Status Register (EPSR) contains an additional bit (the Q bit,
signifying saturation) used by some ARM processors, including the ARM9E.
RAM Random Access Memory
RDI See Remote Debug Interface.
Read-Only Position
Independent
Code and read-only data addresses can be changed at run-time
Read/Write Position
Independent
Read/write data addresses can be changed at run-time
Regions A contiguous sequence of one to three output sections (RO, RW, and ZI) in an imag
Register A processor register
Remote Debug
Interface (RDI)
The Remote Debug Interface (RDI) is an ARM standard procedural interface between
a debugger and the debug agent. RDI gives the debugger a uniform way to communicate
with:
• a debug agent running on the host (for example, ARMulator)
• a debug monitor running on ARM-based hardware accessed through a
communication link (for example, Angel)
• a debug agent controlling an ARM processor through hardware debug support
(for example, Multi-ICE).
Remote_A A communications protocol used, for example, between debugger software such as
ARM eXtended Debugger (AXD) and a debug agent such as Angel.
Retargeting The process of moving code designed for one execution environment to a new execution
environment
RISC Reduced Instruction Set Computer
ROM Read Only Memory
ROPI See Read-Only Position Independent